ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 59
ATxmega64B3
Manufacturer Part Number
ATxmega64B3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64B3
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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8291A–AVR–10/11
• Bit 7:6 – SRCRELOAD[1:0]: Source Address Reload
These bits decide the DMA channel source address reload according to
these bits is ignored while the channel is busy.
Table 5-5.
• Bit 5:4 – SRCDIR[1:0]: Source Address Mode
These bits decide the DMA channel source address mode according to
cannot be changed if the channel is busy.
Table 5-6.
• Bit 3:2 – DESTRELOAD[1:0]: Destination Address Reload
These bits decide the DMA channel destination address reload according to
59. These bits cannot be changed if the channel is busy.
Table 5-7.
• Bit 1:0 – DESTDIR[1:0]: Destination Address Mode
These bits decide the DMA channel destination address mode according to
60. These bits cannot be changed if the channel is busy.
DESTRELOAD[1:0]
SRCRELOAD[1:0]
SRCDIR[1:0]
00
01
10
11
00
01
10
11
00
01
10
11
DMA channel source address reload settings.
DMA channel source address mode settings.
DMA channel destination address reload settings.
Group Configuration
Group Configuration
Group Configuration
TRANSACTION
TRANSACTION
BLOCK
BURST
BLOCK
BURST
FIXED
NONE
NONE
DEC
INC
-
Description
Fixed
Increment
Decrement
Reserved
Description
No reload performed.
DMA source address register is reloaded with initial
value at end of each block transfer.
DMA source address register is reloaded with initial
value at end of each burst transfer.
DMA source address register is reloaded with initial
value at end of each transaction.
Description
No reload performed.
DMA channel destination address register is reloaded
with initial value at end of each block transfer.
DMA channel destination address register is reloaded
with initial value at end of each burst transfer.
DMA channel destination address register is reloaded
with initial value at end of each transaction.
Atmel AVR XMEGA B
Table
Table
Table 5-8 on page
Table 5-7 on page
5-6. These bits
5-5. A write to
59
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