SAM7L64 Atmel Corporation, SAM7L64 Datasheet - Page 177

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SAM7L64

Manufacturer Part Number
SAM7L64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7L64

Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
36 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
80
Ext Interrupts
80
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
3
Segment Lcd
40
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
460
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
6
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.8 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
ARM DDI 0029G
In Figure 7-1 on page 7-4, nWAIT, APE, ALE, and ABE are all HIGH during the cycle
shown. T
to ECLK.
Note
cdel
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Copyright © 1994-2001. All rights reserved.
addr
ah
bld
blh
cdel
exd
exh
mdd
mdh
msd
msh
opcd
opch
rwd
rwh
is the delay, on either edge (whichever is greater), from the edge of MCLK
Parameter
MCLKr to address valid
Address hold time from MCLKr
MCLKr to MAS[1:0] and LOCK
MAS[1:0] and LOCK hold from MCLKr
MCLK to ECLK delay
MCLKf to nEXEC valid
nEXEC hold time from MCLKf
MCLKr to nTRANS, nM[4:0], and TBIT valid
nTRANS and nM[4:0] hold time from MCLKr
MCLKf to nMREQ and SEQ valid
nMREQ and SEQ hold time from MCLKf
MCLKr to nOPC valid
nOPC hold time from MCLKr
MCLKr to nRW valid
nRW hold time from MCLKr
Table 7-1 General timing parameters
AC and DC Parameters
Parameter type
Maximum
Minimum
Maximum
Minimum
Maximum
Maximum
Minimum
Minimum
Minimum
Maximum
Minimum
Minimum
Maximum
Maximum
Maximum
7-5

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