SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 19

• Manufacturer Part Number: SAM9G20
• Manufacturer: Atmel Corporation

Specifications of SAM9G20

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 95
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ARM DDI0198D
Signal naming
The level of an asserted signal depends on whether the signal is active-HIGH or
active-LOW. Asserted means HIGH for active-HIGH signals and LOW for active-LOW
signals:
Prefix H
Prefix n
Prefix DH
Prefix IH
Prefix DR
Prefix IR
Prefix ETM Denotes ETM interface signals.
Prefix DBG Denotes debug/JTAG signals.
Prefix CP
Copyright © 2001-2003 ARM Limited. All rights reserved.
Denotes Advanced High-performance Bus (AHB) signals.
Denotes active-LOW signals except in the case of AHB or Advanced
Peripheral Bus APB reset signals. These are named HRESETn and
PRESETn respectively.
Denotes data side AHB signals.
Denotes instruction side AHB signals.
Denotes data side TCM interface signals.
Denotes instruction side TCM interface signals.
Denotes coprocessor interface signals.
High impedance to stable bus
Key to timing diagram conventions
Bus to high impedance
HIGH/LOW to HIGH
HIGH to LOW
Bus change
Bus stable
Transient
Clock
Preface
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