CLC5622IN National Semiconductor, CLC5622IN Datasheet - Page 14

• Manufacturer Part Number: CLC5622IN
• Description: IC AMP VIDEO DUAL 8-DIP
• Manufacturer: National Semiconductor

Specifications of CLC5622IN

• Applications: Current Feedback
• Number Of Circuits: 2
• -3db Bandwidth: 160MHz
• Slew Rate: 370 V/µs
• Current - Supply: 3.2mA
• Current - Output / Channel: 130mA
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *CLC5622IN

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Feedback Resistor Selection
The feedback resistor, R
quency response of a current feedback amplifier. Optimum
performance of the CLC5622, at a gain of +2V/V, is achieved
with R
Typical Performance sections illustrate the recommended R
for several gains. These recommended values of R
the maximum bandwidth with minimal peaking. Within limits,
R
As a rule of thumb, if the recommended R
the bandwidth will be cut in half.
Unity Gain Operation
The recommended R
1.2kΩ. R
node may require a slight increase in R
frequency response.
Load Termination
The CLC5622 can source and sink near equal amounts of
current. For optimum performance, the load should be tied to
V
Driving Cables and Capacitive Loads
When driving cables, double termination is used to prevent
reflections. For capacitive load applications, a small series
resistor at the output of the CLC5622 will improve stability
and settling performance. The Frequency Response vs. C
plot, shown below in Figure 7, gives the recommended
series resistance value for optimum flatness at various ca-
pacitive loads.
• Decrease R
• Increase R
f
CM
V
V
can be adjusted to optimize the frequency response.
V
bandwidth
bandwidth
in
in
.
o
FIGURE 6. Dual Supply Inverting Configuration
f
=
equal to 750Ω. The frequency response plots in the
A
g
v
R
is left open. Parasitic capacitance at the inverting
= −
b
f
to roll off frequency response and compress
R
f
R
3
2
g
to peak frequency response and extend
f
CLC5622
-
+
V
V
f
1/2
CC
EE
8
4
for unity gain (+1V/V) operation is
f
, affects the loop gain and fre-
6.8µF
0.1µF
0.1µF
6.8µF
+
R
f
1
+
Note: R
for the non-inverting input.
Select R
R
in
f
= R
f
to maintain a flat
V
is doubled, then
t
b
|| R
t
o
provides DC bias
to yield desired
g
.
f
01500244
provide
L
f
14
Transmission Line Matching
One method for matching the characteristic impedance (Z
of a transmission line or cable is to place the appropriate
resistor at the input or output of the amplifier. Figure 8 shows
typical inverting and non-inverting circuit configurations for
matching transmission lines.
Non-inverting gain applications:
• Connect R
• Make R
• Use R
Inverting gain applications:
• Connect R
• Make the resistors R
• Make R
The input and output matching resistors attenuate the signal
by a factor of 2, therefore additional gain is needed. Use C
to match the output transmission line over a greater fre-
quency range. C
plifier’s output impedance with frequency.
Power Dissipation
Follow these steps to determine the power consumption of
the CLC5622.
1. Calculate the quiescent (no-load) power: P
(V
2. Calculate the RMS power at the output stage: P
(V
and current across the external load.
3. Calculate the total RMS power: P
V
V
1
2
CC
CC
+
+
caused by the transmission line, or by parasitics.
-
-
−V
−V
R
R
1
4
EE
load
FIGURE 8. Transmission Line Matching
FIGURE 7. Frequency Response vs. C
)
3
) (|
1
5
, R
to isolate the amplifier from reactive loading
\ R
load
3
3
Z
Z
2
0
0
directly to ground.
directly to ground.
g
, R
6
), where V
= Z
compensates for the increase of the am-
6
, and R
0
R
R
R
2
R
5
4
3
g
, R
load
7
6
, and R
equal to Z
CLC5622
+
-
and |
1/2
R
f
load
t
7
= P
equal to Z
0
are the RMS voltage
C
R
.
6
6
amp
+ P
Z
01500245
0
0
0
amp
.
L
01500246
= |
0
R
CC
7
V
0
=
6
o
)