AD9613 Analog Devices, AD9613 Datasheet - Page 8
AD9613
Manufacturer Part Number
AD9613
Description
12-bit, 170/210/250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
Manufacturer
Analog Devices
Datasheet
1.AD9613.pdf
(36 pages)
Specifications of AD9613
Resolution (bits)
12bit
# Chan
2
Sample Rate
250MSPS
Interface
LVDS,Par
Analog Input Type
Diff-Bip
Ain Range
1.75 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP
AD9613
SWITCHING SPECIFICATIONS
Table 4.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS
1
Conversion rate is the clock rate after the divider.
Input Clock Rate
Conversion Rate
CLK Period, Divide-by-1 Mode (t
CLK Pulse Width High (t
Aperture Delay (t
Aperture Uncertainty (Jitter, t
LVDS Mode
Pipeline Delay (Latency)
Wake-Up Time (from Standby)
Wake-Up Time (from Power Down)
Out-of-Range Recovery Time
Aperture Delay (t
Aperture Uncertainty (Jitter, t
Divide-by-1 Mode, DCS Enabled
Divide-by-1 Mode, DCS Disabled
Divide-by-2 Mode Through Divide-by-8 Mode
Data Propagation Delay (t
DCO Propagation Delay (t
DCO to Data Skew (t
1
A
A
)
)
SKEW
CH
)
)
DCO
PD
J
J
)
)
)
CLK
)
)
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Rev. B | Page 8 of 36
Min
40
5.8
2.61
2.76
0.8
0.3
AD9613-170
Typ
2.9
2.9
1.0
0.1
4.8
5.5
0.7
10
1.0
0.1
10
250
Max
170
1.1
3
625
3.19
3.05
Min
40
4.8
2.16
2.28
0.8
0.3
AD9613-210
Typ
2.4
2.4
1.0
0.1
4.8
5.5
0.7
10
1.0
0.1
10
250
3
Max
625
210
2.64
2.52
1.1
Min
40
4
1.8
1.9
0.8
0.3
AD9613-250
Typ
2.0
2.0
1.0
0.1
4.8
5.5
0.7
10
1.0
0.1
10
250
3
Data Sheet
Max
625
250
2.2
2.1
1.1
Unit
MHz
MSPS
ns
ns
ns
ns
ns
ps rms
ns
ns
ns
Cycles
ns
ps rms
μs
μs
Cycles