AD7949 Analog Devices, AD7949 Datasheet - Page 22

• Manufacturer Part Number: AD7949
• Description: 14-Bit, 8-Channel, 250 kSPS PulSAR ADC
• Manufacturer: Analog Devices

Specifications of AD7949

• Resolution (bits): 14bit
• # Chan: 8
• Sample Rate: 250kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni,SE-Uni
• Adc Architecture: SAR
• Pkg Type: CSP

AD7949
The register can be written to during conversion, during acquisi-
tion, or spanning acquisition/conversion, and is updated at the end
of conversion, t
delay when writing the CFG register. Note that, at power-up, the
CFG register is undefined and two dummy conversions are
required to update the register. To preload the CFG register with a
factory setting, hold DIN high for two conversions. Thus
CFG[13:0] = 0x3FFF. This sets the AD7949 for the following:
13
CFG
Table 9. Configuration Register Description
Bit(s)
[13]
[12:10]
[9:7]
[6]
[5:3]
[2:1]
[0]
1
X = don’t care.
Name
CFG
INCC
INx
BW
REF
SEQ
RB
12
INCC
CONV
Description
Configuration update.
0 = keep current configuration settings.
1 = overwrite contents of register.
Input channel configuration. Selection of pseudo bipolar, pseudo differential, pairs, single-ended, or temperature sensor. Refer
to the
Bit 12
0
0
0
1
1
1
Input channel selection in binary fashion.
Bit 9
0
0
…
1
Select bandwidth for low-pass filter. Refer to the
0 = ¼ of BW, uses an additional series resistor to further bandwidth limit the noise. Maximum throughput must also be reduced to ¼.
1 = full BW.
Reference/buffer selection. Selection of internal, external, external buffered, and enabling of the on-chip temperature sensor.
Refer to the
Bit 5
0
0
0
0
1
1
Channel sequencer. Allows for scanning channels in an IN0 to IN[7:0] fashion. Refer to the
Bit 2
0
0
1
1
Read back the CFG register.
0 = read back current configuration at end of data.
1 = do not read back contents of configuration.
(maximum). There is always a one deep
11
INCC
Input Configurations
Voltage Reference Output/Input
Bit 11
0
1
1
0
1
1
Bit 8
0
0
…
1
Bit 4
0
0
1
1
1
1
Bit 1
0
1
0
1
10
INCC
section.
9
INx
Bit 10
X
0
1
X
0
1
Bit 7
0
1
…
1
Bit 3
0
1
0
1
0
1
1
1
8
INx
Rev. C | Page 22 of 32
section.
Function
Bipolar differential pairs; INx− referenced to V
Bipolar; INx referenced to COM = V
Temperature sensor.
Unipolar differential pairs; INx− referenced to GND ± 0.1 V.
Unipolar, INx referenced to COM = GND ± 0.1 V.
Unipolar, INx referenced to GND.
Channel
IN0
IN1
IN7
Function
Internal reference, REF = 2.5 V output, temperature disabled.
Internal reference, REF = 4.096 V output, temperature disabled.
External reference, temperature enabled.
External reference, internal buffer, temperature enabled.
External reference, temperature disabled.
External reference, internal buffer, temperature disabled.
Function
Disable sequencer.
Update configuration during sequence.
Scan IN0 to IN[7:0] (set in CFG[9:7]), then temperature.
Scan IN0 to IN[7:0] (set in CFG[9:7]).
Selectable Low-Pass Filter
7
INx
•
•
•
•
•
Table 9 summarizes the configuration register bit details. See
the Theory of Operation section for more details.
6
BW
IN[7:0] unipolar referenced to GND, sequenced in order
Full bandwidth for a one-pole filter
Internal reference/temperature sensor disabled, buffer
enabled
Enables the internal sequencer
No readback of the CFG register
5
REF
section.
4
REF
REF
/2 ± 0.1 V.
Channel Sequencer
3
REF
REF
/2 ± 0.1 V.
2
SEQ
Data Sheet
section.
1
SEQ
RB
0