AD7656 Analog Devices, AD7656 Datasheet
AD7656
Specifications of AD7656
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AD7656 Summary of contents
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... DSPs. In serial interface mode, the parts have a daisy-chain feature that allows multiple ADCs to connect to a single serial interface. The AD7656/ AD7657/AD7658 can accommodate true bipolar input signals in the ±4 × V range and ± ...
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... AD7656/AD7657/AD7658 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AD7656 .......................................................................................... 3 AD7657 .......................................................................................... 5 AD7658 .......................................................................................... 7 Timing Specifications .................................................................. 9 Absolute Maximum Ratings .......................................................... 10 Thermal Resistance .................................................................... 10 ESD Caution ................................................................................ 10 Pin Configuration and Function Descriptions ........................... 11 REVISION HISTORY 8/10—Rev Rev. C Changes to t Unit in Table 4 ........................................................... 9 ...
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... V min/max 150 150 ppm typ 25 25 ppm/°C max 6 6 ppm/°C typ Rev Page AD7656/AD7657/AD7658 = 2 5.25 V; DRIVE = 16 − −16 Test Conditions/Comments kHz sine wave ± ± ± ...
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... AD7656/AD7657/AD7658 Parameter LOGIC INPUTS Input High Voltage (V ) INH Input Low Voltage (V ) INL Input Current ( Input Capacitance ( LOGIC OUTPUTS Output High Voltage ( Output Low Voltage ( Floating-State Leakage Current 3 Floating-State Output Capacitance Output Coding CONVERSION RATE Conversion Time 2, 3 Track-and-Hold Acquisition Time ...
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... DRIVE 0.3 × V 0.3 × max DRIVE DRIVE ±1 ±1 μA max max Rev Page AD7656/AD7657/AD7658 = 2 5.25 V; DRIVE = 16 − −16 Test Conditions/Comments kHz sine wave kHz kHz f on unselected channels up to 100 kHz IN @ − ...
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... AD7656/AD7657/AD7658 Parameter LOGIC OUTPUTS Output High Voltage ( Output Low Voltage ( Floating-State Leakage Current Floating-State Output Capacitance 3 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time 2, 3 Throughput Rate POWER REQUIREMENTS DRIVE I TOTAL Normal Mode (Static) ...
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... DRIVE 0.3 × V 0.3 × max DRIVE DRIVE ±1 ±1 μA max max Rev Page AD7656/AD7657/AD7658 = 2 5.25 V; DRIVE = 16 − −16 Test Conditions/Comments kHz sine wave kHz kHz f on unselected channels up to 100 kHz IN @ − ...
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... AD7656/AD7657/AD7658 Parameter LOGIC OUTPUTS Output High Voltage ( Output Low Voltage ( Floating-State Leakage Current Floating-State Output Capacitance 3 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time 2, 3 Throughput Rate POWER REQUIREMENTS DRIVE I TOTAL Normal Mode (Static) ...
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... C L 25pF 200µ Figure 2. Load Circuit for Digital Output Timing Specification Rev Page AD7656/AD7657/AD7658 = 2.5 V internal/external, REF Description Conversion time, internal clock Minimum quiet time required between bus relinquish and start of next conversion Acquisition time Minimum CONVST low pulse ...
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... AD7656/AD7657/AD7658 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter V to AGND, DGND AGND, DGND AGND, DGND DGND, AGND CC AGND to DGND V to DGND DRIVE 1 Analog Input Voltage to AGND Digital Input Voltage to DGND ...
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... Nominally at the same supply as the supply of the host interface. This pin should be decoupled to DGND, and 10 μF and 100 nF decoupling capacitors should be placed on the V Digital Ground. This is the ground reference point for all digital circuitry on the AD7656/AD7657/AD7658. Both DGND pins should connect to the DGND plane of a system. The DGND and AGND voltages should ideally be at the same potential and must not be more than 0 ...
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... BUSY Output. This pin transitions high when a conversion is started and remains high until the conversion is complete and the conversion data is latched into the output data registers. A new conversion should not be initiated on the AD7656/AD7657/AD7658 when the BUSY signal is high. Reference Input/Output. The on-chip reference is available on this pin for use external to the AD7656/AD7657/AD7658 ...
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... In serial mode, CONVST A is used to initiate conversions on the selected ADC pairs. Word/Byte Input. When this pin is logic low, data can be transferred to and from the AD7656/AD7657/ AD7658 using the parallel data lines DB[15:0]. When this pin is logic high, byte mode is enabled. In this mode, data is transferred using data lines DB[15:8] and DB[7] takes on its HBEN function ...
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... SNR = +87.33dB SINAD = +87.251dB THD = –104.32dB –80 SFDR = –104.13dB –100 –120 –140 –160 FREQUENCY (kHz) Figure 4. AD7656 FFT for ±10 V Range –20 INTERNAL REFERENCE ±5V RANGE T – –60 SNR = +86.252dB SINAD = +86.196dB THD = –105.11dB –80 SFDR = –98.189dB – ...
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... DRIVE –70 –80 –90 –100 –110 –120 3500 4095 10 Figure 14. AD7656 THD vs. Input Frequency for Various Source Impedances, –40 = +5.25V DRIVE –50 / +5V –60 DRIVE /V = ±12V DD SS –70 –80 –90 –100 –110 – ...
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... DD SS –104 ±5V RANGE, –105 DRIVE ±12V DD SS –106 –107 –40 – TEMPERATURE (°C) Figure 21. AD7656 THD vs. Temperature = 250kSPS RANGE AND 430 480 530 = +5.25V 100 120 140 = +5.25V 100 120 140 ...
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... FREQUENCY OF INPUT NOISE (kHz) Figure 22. Channel-to-Channel Isolation 120 140 –40 Rev Page AD7656/AD7657/AD7658 ±10V RANGE ±5V RANGE DRIVE f = 250kSPS SAMPLE FOR ±5V RANGE ±12V DD SS FOR ±10V RANGE ± ...
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... The AD7656/AD7657/AD7658 are tested using the CCIF standard in which two input frequencies near the top end of the input bandwidth are used. In this case, the second-order terms are ...
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... Figure 19 shows the power supply rejection ratio vs. supply ripple frequency for the AD7656/AD7657/AD7658. The power supply rejection ratio is defined as the ratio of the power in the ADC output at full-scale frequency the power of a 200 mV p-p sine wave applied to the ADC’s V and V supplies of frequency f ...
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... ADCs to accurately convert an input sine wave of full- scale amplitude to 16-/14-/12-bit resolution, respectively. The input bandwidth of the track-and-hold amplifiers is greater than the Nyquist rate of the ADC, even when the AD7656/ AD7657/AD7658 are operating at its maximum throughput rate. The parts can handle input frequencies MHz. ...
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... AV CC and Pin 41, and Pin 46 and Pin 47. For the AD7656, a 100 μF decoupling capacitor can be placed on each of the pin pairs. All of the other supply and reference pins should be decoupled with a 10 μF decoupling capacitor. When the AD7657 is configured in this reduced decoupling pin = 1 ...
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... DRIVING THE ANALOG INPUTS Together, the driver amplifier and the analog input circuit used for the AD7656 must settle for a full-scale step input to a 16-bit level (0.0015%), which is within the specified 550 ns acquisition time of the AD7656. The noise generated by the driver amplifier needs to be kept as low as possible to preserve the SNR and transition noise performance of the AD7656 ...
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... For unused input channel pairs, the associated CONVSTx pin should be tied CONVST A If there is only an 8-bit bus available, the AD7656/AD7657/ AD7658 interface can be configured to operate in byte mode ( 1). In this configuration, the DB7/HBEN/DCEN pin takes on its HBEN function. Each channel conversion result ...
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... ADC pair. DB12 to DB10 in the control register are used to program the range on each ADC pair. After a reset occurs on the AD7656/AD7657/AD7658, the control register contains all zeros. The CONVST A signal is used to initiate a simultaneous conversion on the combination of channels selected via the control register ...
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... CS falling edge. The subsequent 15 data bits are clocked out on the rising edge of the SCLK signal. Data is valid on the SCLK falling edge. To access each conversion result, 16 clock pulses must be provided to the AD7656/AD7657/ AD7658. Figure 32 shows how a 16 SCLK read is used to access the conversion results ...
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... AD7656/AD7657/AD7658 CONVST A, CONVST B, CONVST C BUSY CS SCLK DOUT A DOUT B DOUT C CS SCLK DOUT A DOUT CONVST A, CONVST B, t CONVERT CONVST C t BUSY ACQUISITION CONVERSION CS SCLK DOUT A, DOUT B, DOUT CONVERT ACQ Figure 30. Serial Interface with Three DOUT Lines Figure 31 ...
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... AD7656/AD7657/ D7658 devices in daisy-chain mode. The CS falling edge is used to frame the serial transfer from the AD7656/AD7657/AD7658 devices, to take the bus out of three- state, and to clock out the MSB of the first conversion result. In the example shown in ...
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... MSB V1 DEVICE 1, DOUT B MSB V3 DEVICE 1, DOUT C MSB V5 DEVICE 2, DOUT A MSB V1 DEVICE 2, DOUT B MSB V3 DEVICE 2, DOUT C MSB V5 CONVST DOUT A DCIN A DOUT A DCIN B DOUT B DOUT B AD7656/AD7657/AD7658 CS SCLK CS DCEN = 1 DEVICE 1 Figure 33. Daisy-Chain Configuration LSB V1 MSB V2 LSB V2 MSB V5 LSB V3 MSB V4 LSB V4 MSB V6 ...
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... AD7656/ AD7657/AD7658 pin configuration easily facilitates this. For the AD7656, decouple each pair with a 100 μF capacitor; for the AD7657, decouple each pair with a 33 μF capacitor; for the AD7658, decouple each pair with a 22 μF capacitor. For this minimum decoupling configuration, all other supply and reference pins should be decoupled with a 10 μ ...
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... The EVAL-CONTROL BRD2Z is a complete unit allowing control and communicate with all Analog Devices evaluation boards ending in the CB designators. To order a complete evaluation kit, the particular ADC evaluation board, for example, EVAL-AD7656/AD7657/AD7658CBZ, the EVAL-CONTROL BRD2Z and transformer must be ordered. See the relevant evaluation board technical note for more information. ...
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... NOTES AD7656/AD7657/AD7658 Rev Page ...
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... AD7656/AD7657/AD7658 NOTES ©2006–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05020-0-8/10(C) Rev Page ...