AD7992 Analog Devices, AD7992 Datasheet - Page 27

• Manufacturer Part Number: AD7992
• Description: 2-Channel, 12-Bit ADC with I2C Compatible Interface in 10-Lead MSOP
• Manufacturer: Analog Devices

Specifications of AD7992

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 79kSPS
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: SE-Uni
• Ain Range: Uni (Vref),Uni Vdd
• Adc Architecture: SAR
• Pkg Type: SOP

MODE 3—AUTOMATIC CYCLE MODE
An automatic conversion cycle can be selected and enabled by
writing a value to the cycle timer register. A conversion cycle
interval can be set up on the AD7992 by programming the
relevant bits in the 8-bit cycle timer register, as decoded in
Table 23. Only the 3 LSBs are used; the 5 MSBs should contain
0s (see the Sample Delay and Bit Trial Delay section). When the
3 LSBs of the register are programmed with any configuration
other than all 0s, a conversion takes place every X ms; the cycle
interval, X, depends on the configuration of these three bits in
the cycle timer register. There are seven different cycle time
intervals to choose from, as shown in Table 23. Once the
conversion has taken place, the part powers down again until
the next conversion occurs. To exit this mode of operation, the
user must program the 3 LSBs of the cycle timer register to
contain all 0s. For cycle interval options, see Table 23.
SDA
SCL
SDA
SCL
Sr
S
1
1
7-BIT ADDRESS
7-BIT ADDRESS
W A
8
R A
ACK BY
ACK BY
AD7992
AD7992
9
9
1
1
COMMAND/ADDRESS
FIRST DATA BYTE
POINT BYTE
(MSBs)
Figure 33. Mode 2 Sequence Operation
MASTER
ACK BY
RESULT FROM CH1
ACK BY
AD7992
A
A
9
9
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SECOND DATA BYTE
(LSBs)
To select a channel(s) for operation in cycle mode, set the
corresponding channel bit(s), D5 to D4, of the configuration
register. If more than one channel bit is set in the configuration
register, the ADC automatically cycles through the channel
sequence, starting with the lowest channel. Once the sequence
is complete, the ADC starts converting on the lowest channel
again, continuing to loop through the sequence until the cycle
timer register contents are set to all 0s. This mode is useful for
monitoring signals, such as battery voltage and temperature,
alerting only when the limits are violated.
MASTER
ACK BY
A
9
FIRST DATA BYTE
(MSBs)
RESULT FROM CH2
MASTER
ACK BY
A
9
SECOND DATA BYTE
(LSBs)
AD7992
A/A
9