AD7684 Analog Devices, AD7684 Datasheet - Page 5

• Manufacturer Part Number: AD7684
• Manufacturer: Analog Devices

Specifications of AD7684

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 100kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: SAR
• Pkg Type: SOP

TIMING SPECIFICATIONS
VDD = 2.7 V to 5.5 V, T
Table 5.
Parameter
Throughput Rate
CS Falling to DCLOCK Low
CS Falling to DCLOCK Rising
DCLOCK Falling to Data Remains Valid
CS Rising Edge to D
DCLOCK Falling to Data Valid
Acquisition Time
D
D
Timing Diagrams
OUT
OUT
Fall Time
Rise Time
DCLOCK
D
OUT
OUT
CS
NOTE:
A MINIMUM OF 22 CLOCK CYCLES ARE REQUIRED FOR 16-BIT CONVERSION. SHOWN ARE 24 CLOCK CYCLES.
D
High Impedance
OUT
A
= −40°C to +85°C, unless otherwise noted.
GOES LOW ON THE DCLOCK FALLING EDGE FOLLOWING THE LSB READING.
1
t
CSD
t
SUCS
Hi-Z
4
D
5
OUT
t
DELAY
0.8V
0
t
(MSB)
EN
Figure 3. Load Circuit for Digital Interface Timing
D15 D14 D13 D12 D11 D10 D9 D8 D7
t
CYC
Figure 4. Voltage Reference Levels for Timing
t
R
TO D
Figure 5. D
OUT
Figure 2. Serial Interface Timing
2V
0.8V
100pF
Rev. A | Page 5 of 16
C
L
t
HDO
OUT
500μA
500μA
Rise and Fall Timing
COMPLETE CYCLE
I
I
OL
OH
2V
t
F
t
DELAY
2V
0.8V
1.4V
D6 D5 D4 D3
Symbol
t
t
t
t
t
t
t
t
t
CYC
CSD
SUCS
HDO
DIS
EN
ACQ
F
R
90%
10%
POWER DOWN
Min
20
5
400
D2 D1 D0
(LSB)
0
Typ
16
14
16
11
11
t
DIS
Hi-Z
t
ACQ
Max
100
0
100
50
25
25
AD7684
Unit
kHz
μs
ns
ns
ns
ns
ns
ns
ns