AD7441 Analog Devices, AD7441 Datasheet - Page 9

• Manufacturer Part Number: AD7441
• Description: Pseudo Differential Input, 1 MSPS, 10-Bit ADC in an 8-Lead SOT-23
• Manufacturer: Analog Devices

Specifications of AD7441

• Resolution (bits): 10bit
• # Chan: 1
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: SAR
• Pkg Type: SOP,SOT

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
MSOP
1
2
3
4
5
6
7
8
Pin. No.
SOT-23
8
7
6
5
4
3
2
1
Figure 5. 8-Lead MSOP Pin Configuration
V
GND
V
V
REF
IN+
IN–
Mnemonic
V
V
V
GND
CS
SDATA
SCLK
V
REF
IN+
IN–
DD
1
2
3
4
(Not to Scale)
AD7441/
AD7451
TOP VIEW
Description
Reference Input for the AD7441/AD7451. An external reference in the range of 100 mV to V
applied to this input. The specified reference input is 2.5 V. This pin is decoupled to GND with a capacitor
of at least 0.1 μF.
Noninverting Analog Input.
Inverting Input. This pin sets the ground reference point for the V
offset to provide a pseudo ground.
Analog Ground. Ground reference point for all circuitry on the AD7441/AD7451. All analog input signals
and any external reference signal are referred to this GND voltage.
Chip Select. Active low logic input. This input provides the dual function of initiating a conversion on
the AD7441/AD7451 and framing the serial data transfer.
Serial Data, Logic Output. The conversion result from the AD7441/AD7451 is provided on this output as
a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream of
the AD7451 consists of four leading zeros followed by the 12 bits of conversion data that are provided
MSB first; the data stream of the AD7441 consists of four leading zeros, followed by the 10 bits of con-
version data, followed by two trailing zeros. In both cases, the output coding is straight (natural) binary.
Serial Clock, Logic Input. SCLK provides the serial clock for accessing data from the part. This clock input
is also used as the clock source for the conversion process.
Power Supply Input. V
10 μF tantalum capacitor.
8
7
6
5
V
SCLK
SDATA
CS
DD
DD
is 2.7 V to 5.25 V. This supply is decoupled to GND with a 0.1 μF capacitor and a
Rev. D | Page 9 of 24
Figure 6. 8-Lead SOT-23 Pin Configuration
SDATA
SCLK
V
CS
DD
1
2
3
4
IN+
(Not to Scale)
AD7441/
AD7451
TOP VIEW
input. Connect to ground or to a dc
8
7
6
5
AD7441/AD7451
V
V
V
GND
REF
IN+
IN–
DD
must be