AD7734 Analog Devices, AD7734 Datasheet - Page 12

• Manufacturer Part Number: AD7734
• Manufacturer: Analog Devices

Specifications of AD7734

• Resolution (bits): 24bit
• # Chan: 4
• Sample Rate: 3.05MSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Bip,SE-Uni
• Ain Range: Bip 10V,Bip 5.0V,Uni 10V,Uni 5.0V
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

AD7734
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
Table 10. Pin Function Descriptions—28-Lead TSSOP
Pin No.
1
2
3
4
5
6
7
8
MCLKOUT
SYNC/P1
INTBIAS
MCLKIN
RESET
BIAS0
BIAS1
MUX0
SCLK
AV
AIN0
AIN1
Figure 11. 28-Lead TSSOP
CS
DD
P0
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Mnemonic
SCLK
MCLKIN
MCLKOUT
CS
RESET
AV
P0
SYNC/P1
(Not to Scale)
AD7734
TOP VIEW
DD
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DGND
DV
DIN
DOUT
RDY
AGND
REFIN(–)
REFIN(+)
BIASHI
BIASLO
BIAS3
AIN3
AIN2
BIAS2
DD
Description
Serial Clock. Schmitt triggered logic input. An external serial clock is applied to this input
to transfer serial data to or from the AD7734.
Master Clock Signal for the ADC. This can be provided in the form of a crystal/resonator
or external clock. A crystal/resonator can be tied across the MCLKIN and MCLKOUT pins.
Alternatively, the MCLKIN pin can be driven with a CMOS compatible clock and
MCLKOUT left unconnected.
When the master clock for the device is a crystal/resonator, the crystal/resonator is
connected between MCLKIN and MCLKOUT. If an external clock is applied to the
MCLKIN, MCLKOUT provides an inverted clock signal or can be switched off to reduce
the device power consumption. MCLK OUT is capable of driving one CMOS load.
Chip Select. Active low Schmitt triggered logic input with an internal pull-up resistor.
With this input hardwired low, the AD7734 can operate in its 3-wire interface mode
using SCLK, DIN, and DOUT. CS can be used to select the device in systems with more
than one device on the serial bus. It can also be used as an 8-bit frame
synchronization signal.
Schmitt Triggered Logic Input. Active low input that resets the control logic, interface
logic, digital filter, analog modulator, and all on-chip registers of the part to power-on
status. Effectively, everything on the part except the clock oscillator is reset when the
RESET pin is exercised.
Analog Positive Supply Voltage. 5 V to AGND nominal.
Digital Input/Output. The pin direction is determined by the P0 DIR bit; the digital
value can be read/written as the P0 bit in the I/O port register. The digital voltage is
referenced to analog supplies. When configured as an input, the pin should be tied
high or low.
the digital value can be read/written as the P1 bit in the I/O port register. When the
SYNC bit in the I/O port register is set to 1, then the SYNC/P1 pin can be used to
synchronize the AD7734 modulator and digital filter with other devices in the system.
The digital voltage is referenced to analog supplies. When configured as an input, the
pin should be tied high or low.
SYNC/Digital Input/Digital Output. The pin direction is determined by the P1 DIR bit;
Rev. 0 | Page 12 of 32
SYNC/P1
INTBIAS
BIASLO
BIASHI
BIAS0
BIAS1
BIAS2
BIAS3
MUX0
AIN0
AIN1
AIN2
AIN3
P0
R=15.5kΩ
AGND AV
7R
7R
7R
7R
7R
R
R
R
R
AV
I/O PORT
DD
MUX
Figure 12. Block Diagram
DD
MCLKOUT
CALIBRATION
GENERATOR
CIRCUITRY
AD7734
BUFFER
CLOCK
MCLKIN
REFIN(–)
INTERFACE
CONTROL
DGND
REFERENCE
SERIAL
LOGIC
Σ-∆ ADC
DETECT
24-BIT
DV
REFIN(+)
DD
DV
DD
CS
SCLK
DIN
DOUT
RESET
RDY