AD7650 Analog Devices, AD7650 Datasheet
AD7650
Specifications of AD7650
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AD7650 Summary of contents
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... The AD7650 is a 570 kSPS, charge redistribution, 16-bit SAR ADC. 2. Single-Supply Operation The AD7650 operates from a single 5 V supply. In impulse mode, its power dissipation decreases with the throughput from 444 kSPS throughput to, for instance, only 21 µ 100 SPS throughput. It consumes 7 µW maximum when in power-down ...
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... AD7650–SPECIFICATIONS Parameter Condition RESOLUTION ANALOG INPUT Voltage Range V IN+ Operating Input Voltage V IN+ V IN– Analog Input CMRR f IN Input Current 570 kSPS Throughput Input Impedance THROUGHPUT SPEED Complete Cycle In Warp Mode Throughput Rate In Warp Mode Time Between Conversions In Warp Mode ...
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... Max 15.5 4.2 100 115 +85 Min Typ Max 5 1.75/2/2.25 Note 1 30 1.5/1.75 1.5/1.75/2 250 10 1.5/1.75 25/275/525 9.5 4.5 3 AD7650 AD7650 Unit mA mA µ µW µW °C Unit ns µs ns µ µ µ ...
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... AD7650 TIMING SPECIFICATIONS (continued) Parameter REFER TO FIGURES 13 AND 14 (continued) SCLK Last Edge to SYNC Delay CS HIGH to SYNC HI-Z CS HIGH to Internal SCLK HI-Z CS HIGH to SDOUT HI-Z BUSY HIGH in Master Serial Read After Convert (Warp Mode/Normal Mode/Impulse Mode) CNVST LOW to SYNC Asserted Delay (Warp Mode/Normal Mode/Impulse Mode) ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7650 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150° ...
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... PIN CONFIGURATION 48-Lead LQFP and 48-Lead LFSCP (ST-48 and CP-48 AGND 1 PIN 1 AVDD 2 IDENTIFIER NC 3 DGND 4 OB/2C 5 AD7650 WARP 6 TOP VIEW IMPULSE 7 (Not to Scale) SER/PAR PIN FUNCTION DESCRIPTIONS ...
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... Chip Select. When CS and RD are both LOW, the interface parallel or serial output bus is enabled also used to gate the external clock. Reset Input. When set to a logic HIGH, reset the AD7650. Current conversion if any is aborted. If not used, this pin could be tied to DGND. ...
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... CNVST input to when the input signal is held for a conversion. TRANSIENT RESPONSE The time required for the AD7650 to achieve its rated accuracy after a full-scale step function is applied to its input. OVERVOLTAGE RECOVERY The time required for the ADC to recover to full accuracy after an analog input signal 150% of full-scale is reduced to 50% of the full-scale value ...
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... AVDD, WARP/NORMAL 10k DVDD, WARP/NORMAL 1k 100 AVDD, IMPULSE DVDD, IMPULSE 10 1 0.1 OVDD, ALL MODES 0.01 0.001 0 100 1k 10k 100k 1M SAMPLING RATE – SPS AD7650 10000 9514 9000 8000 7000 6000 5000 4000 3336 3303 3000 2000 1000 151 ...
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... ADC that does not exhibit any pipe- line or latency, making it ideal for multiple multiplexed channel applications. The AD7650 can be operated from a single 5 V supply and be interfaced to either digital logic housed in 48-lead LQFP tiny 48-LFCSP packages that save space and allows flexible configurations as either serial or parallel interface ...
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... Using the OB/2C digital input, the AD7650 offers two output codings: straight binary and two’s complement. The LSB size is /65536, which is about 38.15 µV. The ideal transfer char- V REF acteristic for the AD7650 is shown in Figure 4 and Table I. 1 LSB = V /65536 REF 111...111 111 ...
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... input range with a reference voltage The AD780 can be selected with reference voltage. Power Supply The AD7650 uses three sets of power supply pins: an analog 5 V supply AVDD, a digital 5 V core supply DVDD, and a digital input/output interface supply OVDD. The OVDD supply allows direct interface with any logic working between 2 ...
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... The serial interface is multiplexed on the parallel data bus. The AD7650 digital interface also accommodates both logic by simply connecting the OVDD supply pin of the AD7650 to the host system interface digital supply. Finally, by using the OB/2C input pin, both two’ ...
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... MASTER SERIAL INTERFACE Internal Clock The AD7650 is configured to generate and provide the serial data clock SCLK when the EXT/ also generates a SYNC signal to indicate to the host when the serial data is valid. The serial clock SCLK and the SYNC signal can be inverted if desired ...
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... SDOUT Usually, because the AD7650 is used with a fast throughput, the mode master, read during conversion is the most recommended serial mode when it can be used. In read-during-conversion mode, the serial clock and data toggle at appropriate instants which minimize potential feedthrough between digital activity and the critical conversion decisions. ...
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... AD7650 CS BUSY SCLK t 31 SDOUT t 16 SDIN CNVST BUSY t 3 SCLK t 31 SDOUT t 16 BUSY AD7650 AD7650 #2 (UPSTREAM) (DOWNSTREAM) RDC/SDIN SDOUT RDC/SDIN CNVST CS SCLK SCLK CNVST IN EXT/INT = 1 INVSCLK = D15 D14 D13 t 34 ...
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... INVSCLK ADDITIONAL PINS OMITTED FOR CLARITY ADSP-21065L in Master Serial Interface As shown in Figure 19, the AD7650 can be interfaced to the ADSP-21065L using the serial interface in master mode without any glue logic required. This mode combines the advantages of reducing the number of wire connections and being able to read the data during or after conversion at user convenience ...
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... This facilitates the use of ground planes that can be easily separated. Digital and analog ground planes should be joined in only one place, preferably underneath the AD7650 or, at least, as close as possible to the AD7650. If the AD7650 system where multiple devices require analog-to-digital ground connections, the connection should still be made at one point only, a star ground point, which should be established as close as possible to the AD7650 ...
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... MIN 0.011 (0.27) 0.019 (0.5) BSC 0.006 (0.17) 0.057 (1.45) 7 0.053 (1.35) 0 0.006 (0.15) SEATING PLANE 0.002 (0.05) (CP-48) 0.024 (0.60) 0.017 (0.42) 0.009 (0.24) 0.024 (0.60) 0.017 (0.42 0.009 (0.24 BOTTOM VIEW 1 25 0.020 (0.50 0.016 (0.40) 0.012 (0.30) 0.012 (0.30) 0.009 (0.23) 0.007 (0.18) 0.002 (0.05) 0.0004 (0.01) PADDLE CONNECTED TO AGND 0.0 (0.0) AD7650 0.215 (5.45) 0.209 (5.30) SQ 0.203 (5.15) ...
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