AD7715 Analog Devices, AD7715 Datasheet - Page 29

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AD7715

Manufacturer Part Number
AD7715
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7715

Resolution (bits)
16bit
# Chan
1
Sample Rate
19.2kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
(Vref/PGA Gain) p-p,Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC,SOP

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Evaluating the AD7715 Performance
The recommended layout for the AD7715 is outlined in the
evaluation board for the AD7715. The evaluation board
package includes a fully assembled and tested evaluation board,
documentation, software for controlling the board over the USB
port of a PC and software for analyzing the performance of the
AD7715 on the PC. The evaluation board model number is
EVAL-AD7715-3EBZ .
Noise levels in the signals applied to the AD7715 may also affect
performance of the part. The AD7715 software evaluation
package allows the user to evaluate the true performance of the
part, independent of the analog input signal. The scheme
involves using a test mode on the part where the differential
inputs to the AD7715 are internally shorted together to provide
a zero differential voltage for the analog modulator. External to
the device, connect the AIN(−) input to a voltage which is
within the allowable common-mode range of the part. This
scheme should be used after a calibration has been performed
on the part.
Rev. D | Page 29 of 40
DIGITAL INTERFACE
The programmable functions of the AD7715 are controlled
using a set of on-chip registers as outlined previously. Data is
written to these registers via the serial interface of the part and
read access to the on-chip registers is also provided by this
interface. All communications to the part must start with a
write operation to the communications register. After power-on
or RESET, the device expects a write to its communications
register. The data written to this register determines whether
the next operation to the part is a read or a write operation and
also determines to which register this read or write operation
occurs. Therefore, write access to any of the other registers on
the part starts with a write operation to the communications
register followed by a write to the selected register. A read
operation from any other register on the part (including the
output data register) starts with a write operation to the
communications register followed by a read operation from the
selected register.
The serial interface of the AD7715 consists of five signals, CS ,
SCLK, DIN, DOUT, and DRDY . The DIN line is used for
transferring data into the on-chip registers while the DOUT
line is used for accessing data from the on-chip registers. SCLK
is the serial clock input for the device and all data transfers
(either on DIN or DOUT) take place with respect to this SCLK
signal. The DRDY line is used as a status signal to indicate when
data is ready to be read from the data register of the AD7715.
DRDY goes low when a new data word is available in the output
register. It is reset high when a read operation from the data
register is complete. It also goes high prior to the updating of
the output register to indicate when not to read from the device
to ensure that a data read is not attempted while the register is
being updated. CS is used to select the device. It can be used to
decode the AD7715 in systems where a number of parts are
connected to the serial bus.
AD7715

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