AD5780 Analog Devices, AD5780 Datasheet

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AD5780

Manufacturer Part Number
AD5780
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5780

Resolution (bits)
18bit
Dac Settling Time
2.5µs
Max Pos Supply (v)
+16.5V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Ser

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5780ACPZ
Manufacturer:
AD
Quantity:
667
Part Number:
AD5780ACPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Data Sheet
FEATURES
True 18-bit voltage output DAC, ±1 LSB INL
8 nV/√Hz output noise spectral density
0.025 LSB long-term linearity error stability
±0.018
2.5 μs output voltage settling time
3.5 nV-sec midscale glitch impulse
Integrated precision reference buffers
Operating temperature range: −40°C to +125°C
4 mm × 5 mm LFCSP package
Wide power supply range of up to ±16.5 V
35 MHz Schmitt triggered digital interface
1.8 V-compatible digital interface
APPLICATIONS
Medical instrumentation
Test and measurement
Industrial control
Scientific and aerospace instrumentation
Data acquisition systems
Digital gain and offset adjustment
Power supply control
GENERAL DESCRIPTION
The
that operates from a bipolar supply of up to 33 V. The
accepts a positive reference input range of 5 V to V
and a negative reference input range of V
reference inputs are buffered on chip and external buffers are
not required. The
tion of ±1 LSB maximum range, and operation is guaranteed
monotonic with a ±1 LSB DNL maximum range specification.
The part uses a versatile 3-wire serial interface that operates at
clock rates of up to 35 MHz and is compatible with standard
SPI, QSPI™, MICROWIRE™, and DSP interface standards. The
part incorporates a power-on reset circuit that ensures that the
DAC output powers up to 0 V in a known output impedance
state and remains in this state until a valid write to the device
takes place. The part provides an output clamp feature that
places the output in a defined load state.
1
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Protected by U.S. Patent No. 7,884,747.
AD5780
ppm/°C gain error temperature coefficient
1
is a true 18-bit, unbuffered voltage output DAC
AD5780
offers a relative accuracy specifica-
SS
+ 2.5 V to 0 V. Both
DD
− 2.5 V
AD5780
System Ready, 18-Bit ±0.5 LSB INL,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
RESET
Table 1. Related Devices
Part No.
AD5790
AD5791
AD5781
AD5541A/AD5542A
AD5760
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
COMPANION PRODUCTS
Output Amplifier Buffer: AD8675, ADA4898-1,
External Reference:
DC-to-DC Design Tool:
Additional companion products on the
IOV
SYNC
LDAC
SCLK
SDIN
SDO
CLR
CC
True 18-bit accuracy.
Wide power supply range of up to ±16.5 V.
−40°C to +125°C operating temperature range.
Low 8 nV/√Hz noise.
Low ±0.018 ppm/°C gain error temperature coefficient.
DGND
V
CC
REGISTER
CONTROL
POWER-ON RESET
AND CLEAR LOGIC
LOGIC
INPUT
SHIFT
FUNCTIONAL BLOCK DIAGRAM
AND
V
AD5780
SS
V
©2011–2012 Analog Devices, Inc. All rights reserved.
DD
18
ADR445
Voltage Output DAC
Description
20-bit, 2 LSB accurate DAC
20-bit, 1 ppm accurate DAC
18-bit, 0.5 LSB accurate DAC
16-bit, 1 LSB accurate 5 V DAC
16-bit, 0.5 LSB accurate DAC
AGND
DAC
REG
ADIsimPower™
Figure 1.
18
V
REFP
18-BIT
V
DAC
REFN
AD5780 product page
A1
6kΩ
AD5780
6.8kΩ
www.analog.com
R1
ADA4004-1
6.8kΩ
R
FB
R
INV
V
FB
OUT

Related parts for AD5780

AD5780 Summary of contents

Page 1

... LSB accurate DAC 20-bit, 1 ppm accurate DAC 18-bit, 0.5 LSB accurate DAC 16-bit, 1 LSB accurate 5 V DAC 16-bit, 0.5 LSB accurate DAC ADA4004-1 ADR445 ADIsimPower™ AD5780 product page www.analog.com ©2011–2012 Analog Devices, Inc. All rights reserved 6.8kΩ INV ...

Page 2

... Changes to Table 10 and Table 11 ................................................ 22 11/11—Revision 0: Initial Version DAC Architecture....................................................................... 19 Serial Interface ............................................................................ 19 Hardware Control Pins.............................................................. 20 On-Chip Registers...................................................................... 21 AD5780 Features ............................................................................ 24 Power- V......................................................................... 24 Configuring the AD5780 .......................................................... 24 DAC Output State ...................................................................... 24 Output Amplifier Configuration.............................................. 24 Applications Information .............................................................. 26 Typical Operating Circuit ......................................................... 26 Evaluation Board ........................................................................ 27 Outline Dimensions ....................................................................... 28 Ordering Guide .......................................................................... 28 Rev ...

Page 3

... REFP REFN nV-sec −10 V, see Figure 43 REFP REFN nV-sec see Figure 44 REFP REFN nV-sec see Figure 45 REFP REFN nV-sec On removal of output ground clamp nV-sec kΩ kΩ AD5780 = −10 V, ADA4898-1 ...

Page 4

... Linearity error refers to both INL error and DNL error, either parameter can be expected to drift by the amount specified after the length of time specified. 4 The AD5780 is configured in the unity-gain mode with a low-pass RC filter on the output 300 Ω 143 pF (total capacitance seen by the output buffer, lead capacitance, and so forth). ...

Page 5

... SCLK rising edge to SDO valid ( min SYNC rising edge to SCLK rising edge ignore 35 ns typ RESET pulse width low 150 ns typ RESET pulse activation time ) and timed from a voltage level Rev Page AD5780 = ...

Page 6

... AD5780 SCLK SYNC t 8 SDIN DB23 t 10 LDAC V OUT V OUT CLR V OUT RESET V OUT t 17 SCLK SYNC t 8 SDIN DB23 INPUT WORD SPECIFIES REGISTER TO BE READ SDO DB0 t 15 ...

Page 7

... DB23 INPUT WORD FOR DAC N DB23 SDO DB0 DB23 INPUT WORD FOR DAC N – 1 DB0 DB23 INPUT WORD FOR DAC N UNDEFINED Figure 4. Daisy-Chain Mode Timing Diagram Rev Page AD5780 DB0 DB0 ...

Page 8

... AD5780 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 4. Parameter Rating V to AGND −0 + AGND − +0 −0 + DGND −0 ...

Page 9

... AD5780 to its power-on status. should be decoupled to DGND. CC AD5780 Features section for further details. AD5780 Features section for further details voltage in the range of −16 −2.5 V can be connected to this pin Rev Page AD5780 must be DD Table 12 ) and updates the DAC SS ...

Page 10

... AD5780 TYPICAL PERFORMANCE CHARACTERISTICS 0.4 AD8675 OUTPUT BUFFER T = 25°C A 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 0 50000 100000 150000 200000 DAC CODE Figure 6. Integral Nonlinearity Error vs. DAC Code, ±10 V Span 0.6 AD8675 OUTPUT BUFFER T = 25°C A 0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 0 50000 100000 150000 ...

Page 11

... TEMPERATURE (°C) Figure 15. Differential Nonlinearity Error vs. Temperature 0.4 0.3 INL MAX 0.2 0 25° +10V 0 REFP V = –10V REFN AD8675 OUTPUTBUFFER INL MIN 12.5 13.0 13.5 14.0 14.5 15.0 15.5 V /| 0.4 INL MAX 0 25° REFP REFN AD8675 OUTPUTBUFFER INL MIN 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 V /| AD5780 80 100 16.0 16.5 15.5 16.5 ...

Page 12

... AD5780 0.35 DNL MAX 0.30 0.25 0. 25° +10V REFP V = –10V REFN 0.15 AD8675 OUTPUT BUFFER 0.10 0.05 DNL MIN 0 –0.05 12.5 13.0 13.5 14.0 14.5 15.0 V /| Figure 18. Differential Nonlinearity Error vs. Supply Voltage, ±10 V Span 0.35 DNL MAX 0.30 0.25 0. 25° REFP REFN 0.15 AD8675 OUTPUT BUFFER 0.10 0.05 DNL MIN 0 –0.05 7.5 8.5 9.5 10.5 11.5 12.5 V /|V | (V) ...

Page 13

... AD8675 OUTPUT BUFFER –0.2 INL MIN –0.3 –0.4 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 V /|V | (V) REFP REFN Figure 28. Integral Nonlinearity Error vs. Reference Voltage 0.30 INL MAX 0.25 0.20 0. 25° +15V –15V SS 0.10 AD8675 OUTPUT BUFFER 0.05 INL MIN 0 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 V /|V | (V) REFP REFN Figure 29. Differential Nonlinearity Error vs. Reference Voltage AD5780 14.5 15.5 16.5 9.0 9.5 10.0 9.0 9.5 10.0 ...

Page 14

... AD5780 –0. AD8675 OUTPUT BUFFER –0.10 –0.15 –0.20 –0.25 –0.30 –0.35 –0.40 5.0 5.5 6.0 6.5 7.0 7.5 8.0 V /|V | (V) REFP REFN Figure 30. Zero-Scale Error vs. Reference Voltage –0 25° –0 AD8675 OUTPUT BUFFER –0.4 –0.5 –0.6 –0.7 –0.8 –0.9 –1.0 5.0 5.5 6.0 6.5 7.0 7.5 8.0 V /|V | (V) REFP REFN Figure 31 ...

Page 15

... TIME (µs) Figure 40. Rising Full-Scale Voltage Step +15V –15V +10V REFP V = –10V REFN ADA4808-1 BUFFERED 2 LOAD = 10MΩ || 20pF 0 –2 –4 –6 –8 –10 – TIME (µs) Figure 41. Falling Full-Scale Voltage Step AD5780 ...

Page 16

... AD5780 REFP V REFN RC LOW-PASS FILTER 1 UNITY-GAIN MODE ADA4898-1 OUTPUT BUFFER 0 – TIME (µs) Figure 42. 500 Code Step Settling Time +10V REFP V = –10V REFN UNITY-GAIN MODE ADA4898-1 OUTPUT BUFFER 20 RC LOW-PASS FILTER NEGATIVE CODE CHANGE ...

Page 17

... –15V SS 180 V = +10V REFP V = –10V REFN 160 140 120 100 –20 1k 10k 0 Figure 49. Glitch Impulse on Removal of Output Clamp Rev Page AD5780 V = +15V –15V +10V REFP V = –10V REFN UNITY GAIN ADA4898 TIME (µs) 6 ...

Page 18

... For fast settling applications, a high speed buffer amplifier is required to buffer the load from the 3.4 kΩ output impedance of the AD5780, in which case the amplifier that determines the settling time. Digital-to-Analog Glitch Impulse ...

Page 19

... DD V REFP V REFN SERIAL INTERFACE The AD5780 SDIN) that is compatible with SPI, QSPI, and MICROWIRE interface standards, as well as most DSPs (see or buffered REFP timing diagram). Input Shift Register The input shift register is 24 bits wide. Data is loaded into the device MSB first as a 24-bit word under the control of a serial clock input, SCLK, which can operate MHz ...

Page 20

... Therefore, the total number of clock cycles must equal 24 × N, where N is the total number of AD5780 devices in the chain. When the serial transfer to all devices is complete, SYNC is taken high. This latches the input data in each device in the daisy chain and prevents any further data from being clocked into the input shift register ...

Page 21

... DB19 to DB2 DAC register data 1 18 bits of data Rev Page Table − × REFP REFN V REFN the negative voltage applied at the V REFN is the positive voltage applied at the V REFP DB1 1 X AD5780 ). input pin. input pin. LSB DB0 ...

Page 22

... DB20 DB19 to DB2 Clearcode register data 1 18 bits of data Rev Page Data Sheet DB4 DB3 DB2 DB1 BIN/2sC DACTRI OPGND RBUF AD5780 Features section for further details. and INV FB AD5780 Features section for DB1 DB0 LSB DB0 Reserved ...

Page 23

... DAC register coding that is being used, either binary or twos complement. Reset Setting this bit to 1 returns the DB20 DB19 to DB3 0 Reserved AD5780 to its power-on state. Rev Page DB2 DB1 DB0 Software control register data Reset CLR 1 LDAC AD5780 LSB 2 ...

Page 24

... Output is clamped via ~6 kΩ to AGND. OUTPUT AMPLIFIER CONFIGURATION There are a number of different ways that an output amplifier can be connected to the AD5780, depending on the voltage references applied and the desired output voltage span. Unity-Gain Configuration Figure 52 shows an output amplifier configured for unity gain. ...

Page 25

... V. For this mode of operation, the RBUF bit of the control register must be cleared to Logic 0. V REFP 18-BIT − DAC REFN = REFN V REFN Figure 54. Output Amplifier in Gain-of-Two Configuration Rev Page AD5780 10pF 6.8kΩ 6.8kΩ V INV OUT V AD8675, OUT ADA4898-1, ADA4004-1 AD5780 ...

Page 26

... AD5780 APPLICATIONS INFORMATION TYPICAL OPERATING CIRCUIT Figure 55. Typical Operating Circuit Rev Page Data Sheet 09649-054 ...

Page 27

... USB port of a PC. Software is available with the evaluation board to allow the user to easily program the AD5780. The software runs on any PC that has Microsoft® Windows® XP (SP2), Vista (32-bit or 64-bit), or Windows 7 installed. The AD5780 ...

Page 28

... AD5780ACPZ −40°C to +125°C AD5780ACPZ-REEL7 −40°C to +125°C AD5780BCPZ −40°C to +125°C AD5780BCPZ-REEL7 −40°C to +125°C EVAL-AD5780SDZ RoHS Compliant Part. ©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...

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