AD5663 Analog Devices, AD5663 Datasheet

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AD5663

Manufacturer Part Number
AD5663
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5663

Resolution (bits)
16bit
Dac Update Rate
220kSPS
Dac Settling Time
4µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

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FEATURES
Low power, dual 16-bit nanoDAC
Relative accuracy: ±12 LSBs maximum
Guaranteed monotonic by design
10-lead MSOP and 3 mm × 3 mm LFCSP_WD
2.7 V to 5.5 V power supply
Per channel power-down
Power-on reset to zero scale or midscale
Hardware LDAC and CLR functions
Serial interface; up to 50 MHz
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5663, a member of the nanoDAC family, is a low power,
dual, 16-bit buffered voltage-out DAC that operates from a single
2.7 V to 5.5 V supply and is guaranteed monotonic by design.
The AD5663 requires an external reference voltage to set the
output range of the DAC. The part incorporates a power-on
reset circuit that ensures the DAC output powers up to 0 V or
midscale (AD5663-1) and remains there until a valid write takes
place. The part contains a power-down feature that reduces the
current consumption of the device to 480 nA at 5 V and provides
software-selectable output loads while in power-down mode.
The low power consumption of this part in normal operation
makes it ideally suited to portable, battery-operated equipment.
The power consumption is 1.25 mW at 5 V, going down to
2.4 μW in power-down mode.
The on-chip precision output amplifier of the AD5663 allows
rail-to-rail output swing to be achieved.
The AD5663 uses a versatile, 3-wire serial interface that
operates at clock rates up to 50 MHz and is compatible with
standard SPI®, QSPI™, MICROWIRE™, and DSP interface
standards.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2.7 V to 5.5 V, 250 μA, Rail-to-Rail Output,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
SYNC
Table 1. Related Devices
Part No.
AD5623R/AD5643R/AD5663R
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
SCLK
DIN
Dual 16-bit DAC; relative accuracy of ±12 LSBs maximum.
Available in 10-lead MSOP and 10-lead, 3 mm × 3 mm
LFCSP_WD packages.
Low power; typically consumes 0.6 mW at 3 V and
1.25 mW at 5 V.
7 μs maximum settling time.
INTERFACE
LDAC
LOGIC
FUNCTIONAL BLOCK DIAGRAM
CLR
LDAC
Dual 16-Bit nanoDAC
REGISTER
REGISTER
INPUT
INPUT
AD5663
©2006 Analog Devices, Inc. All rights reserved.
REGISTER
REGISTER
Figure 1.
DAC
DAC
GND
V
DD
Description
2.7 V to 5.5 V, dual 12-/14-/16-bit
DACs with internal reference
POWER-ON
STRING
STRING
RESET
DAC A
DAC B
V
REF
BUFFER
BUFFER
AD5663
www.analog.com
POWER-DOWN
LOGIC
V
V
OUT
OUT
®
A
B

Related parts for AD5663

AD5663 Summary of contents

Page 1

... Programmable voltage and current sources Programmable attenuators GENERAL DESCRIPTION The AD5663, a member of the nanoDAC family low power, dual, 16-bit buffered voltage-out DAC that operates from a single 2 5.5 V supply and is guaranteed monotonic by design. The AD5663 requires an external reference voltage to set the output range of the DAC ...

Page 2

... Power-Down Modes .................................................................. 16 LDAC Function .......................................................................... 16 Microprocessor Interfacing....................................................... 18 Applications..................................................................................... 19 Choosing a Reference for the AD5663.................................... 19 Using a Reference as a Power Supply for the AD5663 .......... 19 Bipolar Operation Using the AD5663 ..................................... 20 Using the AD5663 with a Galvanically Isolated Interface .... 20 Power Supply Bypassing and Grounding................................ 20 Outline Dimensions ....................................................................... 21 Ordering Guide .......................................................................... 21 ...

Page 3

... DD 1 Temperature range: A grade and B grade are both equal to −40°C to +105°C. 2 Linearty calculated using a reduced code range: AD5663 (Code 512 to Code 65024). Output unloaded. 3 Guaranteed by design and characterization, not production tested. 4 Interface inactive. All DACs active. DAC outputs unloaded. ...

Page 4

... AD5663 AC CHARACTERISTICS kΩ to GND Table 3. 2 Parameter Min Output Voltage Settling Time Slew Rate Digital-to-Analog Glitch Impulse Digital Feedthrough Reference Feedthrough Digital Crosstalk Analog Crosstalk DAC-to-DAC Crosstalk Multiplying Bandwidth Total Harmonic Distortion Output Noise Spectral Density ...

Page 5

... CLR pulse width low SCLK falling edge to LDAC falling edge ns min CLR pulse activation time ns max DB0 Figure 2. Serial Write Operation Rev Page )/ AD5663 ...

Page 6

... AD5663 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter V to GND GND OUT V to GND REF Digital Input Voltage to GND Operating Temperature Range Industrial Storage Temperature Range Junction Temperature (T max) J Power Dissipation LFCSP_WD Package (4-Layer Board) θ Thermal Impedance ...

Page 7

... DD 10 μF capacitor in parallel with a 0.1 μF capacitor to GND Reference Voltage Input. REF OUT REF OUT AD5663 DD GND DIN 3 8 TOP VIEW (Not to Scale) LDAC SCLK 4 7 CLR SYNC 5 6 Figure 3. Pin Configuration Rev Page AD5663 ...

Page 8

... AD5663 TYPICAL PERFORMANCE CHARACTERISTICS REF 25° –2 –4 –6 –8 – 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k 65k CODE Figure 4. INL 1 REF 0 25°C A 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 – ...

Page 9

... Figure 14. Headroom at Rails vs. Source and Sink Current 0. 25°C A 0.25 0.20 0.15 0.10 0.05 0 –40 5.2 Figure 15. Supply Current vs. Temperature Rev Page AD5663 0.235 0.240 0.245 0.250 0.255 I (mA) DD Figure 13. I Histogram with 5V, 3V DAC LOADED WITH REF = 25°C ZERO SCALE – ...

Page 10

... AD5663 25°C A FULL-SCALE CODE CHANGE 0x0000 TO 0xFFFF OUTPUT LOADED WITH 2kΩ AND 200pF TO GND V = 909mV/DIV OUT 1 TIME BASE = 4µs/DIV Figure 16. Full-Scale Settling Time OUT CH1 2.0V CH2 500mV M100µs 125MS/s A CH1 Figure 17. Power-On Reset ...

Page 11

... CH3 5.0V 100k 1M Rev Page AD5663 25°C A 100k 1M FREQUENCY (Hz) Figure 25. Multiplying Bandwidth CLR V A OUT V B OUT CH2 1.0V M200ns A CH3 1.10V CH4 1.0V Figure 26. CLR Pulse Activation Time ...

Page 12

... DAC register. Ideally, the output should The zero-scale error is always positive in the AD5663 because the output of the DAC cannot go below due to a combination of the offset errors in the DAC and the output amplifier. Zero-scale error is expressed in mV. ...

Page 13

... The amplifiers within the DAC have a finite bandwidth. The multiplying bandwidth is a measure of this. A sine wave on the reference (with full-scale code loaded to the DAC) appears on the output. The multiplying bandwidth is the frequency at which the output amplitude falls below the input. Rev Page AD5663 ...

Page 14

... V OUT SERIAL INTERFACE The AD5663 has a 3-wire serial interface ( SYNC , SCLK, and DIN) that is compatible with SPI, QSPI, and MICROWIRE interface standards, as well as with most DSPs. See Figure 2 for a timing diagram of a typical write sequence. The write sequence begins by bringing the SYNC line low. Data from the DIN line is clocked into the 24-bit shift register on the falling edge of SCLK ...

Page 15

... The AD5663 family contains a power-on reset circuit that controls the output voltage during power-up. The AD5663 DAC outputs power the AD5663-1 powers up to midscale, and the output remains there until a valid write sequence is made to the DAC. This is useful in applications where it is important to know the state of the output of the DAC while the process of powering up ...

Page 16

... OUT updated since the last time LDAC was brought low. Normally, when LDAC is brought low, the DAC registers are filled with the contents of the input registers. In the case of the AD5663, the DAC register updates only if the input register has changed RESISTOR ...

Page 17

... Address bits (A3 to A0); Don’t care Don’t care Rev Page AD5663 LDAC Pin LDAC Operation 1/0 Determined by LDAC pin x = don’t care The DAC registers are updated after new data is read in on the falling edge of the 24th SCLK ...

Page 18

... AD5663 to MICROWIRE Interface Figure 35 shows an interface between the AD5663 and any MICROWIRE-compatible device. Serial data is shifted out on the falling edge of the serial clock and is clocked into the AD5663 on the rising edge of the SK. Rev Page ...

Page 19

... (for example, 15 V). The voltage reference outputs a steady supply voltage for the AD5663; see Table 15 for a suitable reference. If the low drop- out REF195 is used, it must supply 250 μ ...

Page 20

... The printed circuit board containing the AD5663 should have separate analog and digital sections, each having its own area of the board. If the AD5663 system where other devices require an AGND-to-DGND connection, the connection R2 = 10kΩ ...

Page 21

... AD5663ARMZ-REEL7 1 −40°C to +105°C AD5663BRMZ 1 −40°C to +105°C AD5663BRMZ-REEL7 1 −40°C to +105°C AD5663BRMZ-1 1 −40°C to +105°C AD5663BRMZ-1REEL7 1 −40°C to +105°C AD5663BCPZ-250RL7 1 −40°C to +105°C AD5663BCPZ-REEL7 Pb-free part. INDEX AREA 3.00 BSC SQ 1.50 BCS SQ 0.50 BSC TOP VIEW ...

Page 22

... AD5663 NOTES Rev Page ...

Page 23

... NOTES Rev Page AD5663 ...

Page 24

... AD5663 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05855-0-4/06(0) T Rev Page ...

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