AD5382 Analog Devices, AD5382 Datasheet - Page 3

• Manufacturer Part Number: AD5382
• Description: 32-Channel 14-Bit 3 V/5 V Single-Supply Voltage-Output DAC
• Manufacturer: Analog Devices

Specifications of AD5382

• Resolution (bits): 14bit
• Dac Update Rate: 125kSPS
• Dac Settling Time: 8µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Par,Ser,SPI

GENERAL DESCRIPTION
The AD5382 is a complete, single-supply, 32-channel, 14-bit
DAC available in a 100-lead LQFP package. All 32 channels
have an on-chip output amplifier with rail-to-rail operation.
The AD5382 includes an internal software-selectable 1.25 V/
2.5 V, 10 ppm/°C reference, an on-chip channel monitor
function that multiplexes the analog outputs to a common
MON_OUT pin for external monitoring, and an output
amplifier boost mode that allows optimization of the amplifier
slew rate.
The AD5382 contains a double-buffered parallel interface,
which features a 20 ns WR pulse width, an SPI-, QSPI-,
MICROWIRE-, DSP-compatible serial interface with
Table 1. Other High Channel Count, Low Voltage, Single Supply DACs in Product Portfolio
Model
AD5380BST-5
AD5380BST-3
AD5384BBC-5
AD5384BBC-3
AD5381BST-5
AD5381BST-3
AD5383BST-5
AD5383BST-3
AD5390BST-5
AD5390BCP-5
AD5390BST-3
AD5390BCP-3
AD5391BST-5
AD5391BCP-5
AD5391BST-3
AD5391BCP-3
AD5392BST-5
AD5392BCP-5
AD5392BST-3
AD5392BCP-3
Table 2. 40-Channel Bipolar Voltage Output DACs
Model
AD5379ABC
AD5378ABC
Resolution
14 Bits
14 Bits
Resolution
14 Bits
14 Bits
14 Bits
14 Bits
12 Bits
12 Bits
12 Bits
12 Bits
14 Bits
14 Bits
14 Bits
14 Bits
12 Bits
12 Bits
12 Bits
12 Bits
14 Bits
14 Bits
14 Bits
14 Bits
AVDD Range
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
4.5 V to 5.5 V
2.7 V to 3.6 V
2.7 V to 3.6 V
4.5 V to 5.5 V
4.5 V to 5.5 V
2.7 V to 3.6 V
2.7 V to 3.6 V
4.5 V to 5.5 V
4.5 V to 5.5 V
2.7 V to 3.6 V
2.7 V to 3.6 V
Analog
Supplies
±11.4 V to
±16.5 V
±11.4 V to
±16.5 V
Output Channels
40
40
40
40
40
40
32
32
16
16
16
16
16
16
16
16
8
8
8
8
Output Channels
40
32
Rev. B | Page 3 of 40
Linearity Error (LSB)
±4
±4
±4
±4
±1
±1
±1
±1
±3
±3
±4
±4
±1
±1
±1
±1
±3
±3
±4
±4
Linearity Error (LSB)
±3
±3
interface speeds in excess of 30 MHz and an I
interface that supports a 400 kHz data transfer rate.
An input register followed by a DAC register provides double
buffering, allowing the DAC outputs to be updated indepen-
dently or simultaneously using the LDAC input.
Each channel has a programmable gain and offset adjust
register that allows the user to fully calibrate any DAC
channel. Power consumption is typically 0.25 mA/channel
when operating with boost mode disabled.
Package
108-Lead CSPBGA
108-Lead CSPBGA
Package Description
100-Lead LQFP
100-Lead LQFP
100-Lead CSPBGA
100-Lead CSPBGA
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
2
C®-compatible
Package Option
BC-108
BC-108
Package Option
ST-100
ST-100
BC-100
BC-100
ST-100
ST-100
ST-100
ST-100
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
AD5382