AD5530 Analog Devices, AD5530 Datasheet

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AD5530

Manufacturer Part Number
AD5530
Description
Serial Input, Voltage Output 12-Bit D/A Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD5530

Resolution (bits)
12bit
Dac Update Rate
50kSPS
Dac Settling Time
20µs
Max Pos Supply (v)
+16.5V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Ser,SPI

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5530BRUZ
Manufacturer:
AD
Quantity:
20 000
Part Number:
AD5530BRUZ-REEL7
Manufacturer:
SAGAMI
Quantity:
12 000
FEATURES
Pin-compatible 12-, 14-bit digital-to-analog converters
Serial input, voltage output
Maximum output voltage range of ±10 V
Data readback
3-wire serial interface
Clear function to a user-defined voltage
Power-down function
Serial data output for daisy-chaining
16-lead TSSOP
APPLICATIONS
Industrial automation
Automatic test equipment
Process control
General-purpose instrumentation
GENERAL DESCRIPTION
The AD5530/AD5531 are single 12- and 14-bit (respectively)
serial input, voltage output digital-to-analog converters (DAC).
They utilize a versatile 3-wire interface that is compatible with
SPI®, QSPI™, MICROWIRE™, and DSP interface standards. Data
is presented to the part in a 16-bit serial word format. Serial
data is available on the SDO pin for daisy-chaining purposes.
Data readback allows the user to read the contents of the DAC
register via the SDO pin.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
12-/14-Bit Digital-to-Analog Converters
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
REFAGND
The DAC output is buffered by a gain of two amplifier and
referenced to the potential at DUTGND. LDAC can be used to
update the output of the DAC asynchronously. A power-down
pin ( PD ) allows the DAC to be put into a low power state, and
a CLR pin allows the output to be cleared to a user-defined
voltage, the potential at DUTGND.
The AD5530/AD5531 are available in 16-lead TSSOP.
REFIN
LDAC
RBEN
SDIN
Serial Input, Voltage Output
FUNCTIONAL BLOCK DIAGRAM
GND
R
SHIFT REGISTER
V
DAC REGISTER
SS
SCLK
V
©2007 Analog Devices, Inc. All rights reserved.
DD
SYNC
R
Figure 1.
AD5530/AD5531
SDO
12-/14-BIT
DAC
CONTROL LOGIC
POWER-DOWN
AD5530/AD5531
www.analog.com
R
R
V
DUTGND
CLR
PD
OUT

Related parts for AD5530

AD5530 Summary of contents

Page 1

... Automatic test equipment Process control General-purpose instrumentation GENERAL DESCRIPTION The AD5530/AD5531 are single 12- and 14-bit (respectively) serial input, voltage output digital-to-analog converters (DAC). They utilize a versatile 3-wire interface that is compatible with SPI®, QSPI™, MICROWIRE™, and DSP interface standards. Data is presented to the part in a 16-bit serial word format ...

Page 2

... PD Function................................................................................ 13 Readback Function .................................................................... 13 CLR Function.............................................................................. 13 Output Voltage............................................................................ 14 Bipolar Configuration................................................................ 14 Microprocessor Interfacing........................................................... 15 AD5530/AD5531 to ADSP-21xx.............................................. 15 AD5530/AD5531 to 8051 Interface ......................................... 15 AD5530/AD5531 to MC68HC11 Interface ............................ 15 Applications Information .............................................................. 17 Optocoupler Interface................................................................ 17 Serial Interface to Multiple AD5530s or AD5531s ................ 17 Daisy-Chaining Interface with Multiple AD5530s or AD5531s ...................................................................................... 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18 Rev Page ...

Page 3

... Rev Page AD5530/AD5531 unless otherwise noted. MIN MAX Test Conditions/Comments Guaranteed monotonic over temperature Typically within ±1 LSB Typically within ±1 LSB Max output range ±10 V Per input, typically ±20 nA Max output range ± ...

Page 4

... Power-Down DD 1 Temperature range for B Version: −40°C to +85°C. 2 Guaranteed by design, not subject to production test kΩ and C = 220 pF to GND AD5530 AD5531 Unit 12 14 Bits ±1 ±2 LSB max ±1 ±1 LSB max ±2 ±8 LSB max ± ...

Page 5

... LSB DB11 DB0 Figure 2. Timing Diagram for Standalone Mode Rev Page AD5530/AD5531 = 220 pF to GND. All specifications T MIN = 220 pF to GND. All specifications T MIN unless MAX unless MAX = (10% to ...

Page 6

... AD5530/AD5531 DAISY-CHAINING AND READBACK TIMING CHARACTERISTICS −10 −16.5 V; GND = otherwise noted. Table Parameter Limit MIN MAX f 2 MAX t 500 1 t 200 2 t 200 130 ...

Page 7

... − 0 0.3 V ESD CAUTION − − −40°C to +85°C −65°C to +150°C 150°C (T – T )/θ J MAX A JA 150.4°C/W 300°C 235°C Rev Page AD5530/AD5531 ...

Page 8

... DAC Output. OUT 16 V Positive Analog Supply Voltage ± 10 ± 10%, for specified performance. DD REFAGND REFIN OUT LDAC DUTGND 3 14 AD5530/ AD5531 SDIN TOP VIEW (Not to Scale) SYNC RBEN GND 6 11 SCLK ...

Page 9

... –15V 0.8 SS REFIN = +5V REFAGND = 0V 0 25°C A 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 500 1000 1500 2000 2500 CODE Figure 5. AD5530 Typical INL Plot 0 +15V –15V 0.4 SS REFIN = +5V REFAGND = 0V 0 25°C A 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 0 500 1000 1500 2000 ...

Page 10

... AD5530/AD5531 3 2 POSITIVE INL 1 0 NEGATIVE INL –1 –2 –3 2.0 2.5 3.0 3.5 4.0 4.5 REFIN VOLTAGE (V) Figure 11. AD5531 Typical INL Error vs. Reference Voltage 0 –0.5 –1.0 –1.5 –2.0 –2.5 –40 – TEMPERATURE (°C) Figure 12. Typical Full-Scale and Offset Error vs. Temperature 1.50 1.45 +85°C 1.40 +25°C 1.35 –40°C 1.30 1.25 1. ...

Page 11

... V = +15V DD V OUT V = –15V SS REFIN = +5V REFAGND = 25° 2V/DIV 2V/DIV Figure 17. Typical Power-Down Time Rev Page AD5530/AD5531 ...

Page 12

... AD5530/AD5531 TERMINOLOGY Relative Accuracy Relative accuracy or endpoint linearity is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. Differential Nonlinearity Differential nonlinearity is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ± ...

Page 13

... THEORY OF OPERATION DAC ARCHITECTURE The AD5530/AD5531 are pin-compatible 12- and 14-bit DACs. The AD5530 consists of a straight 12-bit R-2R voltage mode DAC, and the AD5531 consists of a 14-bit R-2R section. Using reference connected to the REFIN pin and REFAGND tied bipolar ±10 V voltage output results. The DAC coding is straight binary ...

Page 14

... D is the decimal data-word loaded to the DAC register the resolution of the DAC. BIPOLAR CONFIGURATION Figure 21 shows the AD5530/AD5531 in a bipolar circuit configuration. REFIN is driven by the AD586 reference, and the REFAGND and DUTGND pins are tied to GND. This results in a bipolar output voltage ranging from − +10 V. ...

Page 15

... ADDITIONAL PINS OMITTED FOR CLARITY. Figure 23. AD5530/AD5531 to ADSP-21xx Interface AD5530/AD5531 TO 8051 INTERFACE A serial interface between the AD5530/AD5531 and the 8051 is shown in Figure 24. TxD of the 8051 drives SCLK of the AD5530/AD5531, while RxD drives the serial data line, SDIN. P3.3 and P3.4 are bit-programmable pins on the serial port and are used to drive SYNC and LDAC , respectively ...

Page 16

... AD5530/AD5531 LDAC is controlled by the PC6 port output. The DAC can be updated after each 2-byte transfer by bringing LDAC low. This example does not show other serial lines for the DAC. If CLR were used, it could be controlled by port output PC5. To read data back from the DAC register, the SDO line can be ...

Page 17

... In many process control applications necessary to provide an isolation barrier between the controller and the unit being controlled. Opto-isolators can provide voltage isolation in excess of 3 kV. The serial loading structure of the AD5530/ AD5531 makes it ideal for opto-isolated interfaces because the number of interface lines is kept to a minimum. ...

Page 18

... Temperature Range AD5530BRU −40°C to +85°C AD5530BRU-REEL −40°C to +85°C AD5530BRU-REEL7 −40°C to +85°C 1 AD5530BRUZ −40°C to +85°C AD5530BRUZ-REEL 1 −40°C to +85°C 1 AD5530BRUZ-REEL7 −40°C to +85°C AD5531BRU −40°C to +85°C AD5531BRU-REEL −40°C to +85°C AD5531BRU-REEL7 − ...

Page 19

... NOTES Rev Page AD5530/AD5531 ...

Page 20

... AD5530/AD5531 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00938-0-1/07(B) Rev Page ...

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