AD8597 Analog Devices, AD8597 Datasheet - Page 15

• Manufacturer Part Number: AD8597
• Description: Ultralow Distortion, Ultralow Noise Op Amp (single)
• Manufacturer: Analog Devices

Specifications of AD8597

• -3db Bandwidth: 10MHz
• Slew Rate: 14V/µs
• Vos: 10µV
• Ib: 25nA
• # Opamps Per Pkg: 1
• Input Noise (nv/rthz): 1.07nV/rtHz
• Vcc-vee: 10V to 36V
• Isy Per Amplifier: 5mA
• Packages: CSP,SOIC

FUNCTIONAL OPERATION
INPUT VOLTAGE RANGE
The AD8597/AD8599 are not rail-to-rail input amplifiers;
therefore, care is required to ensure that both inputs do not
exceed the input voltage range. Under normal negative feedback
operating conditions, the amplifier corrects its output to ensure
that the two inputs are at the same voltage. However, if either
input exceeds the input voltage range, the loop opens and large
currents begin to flow through the ESD protection diodes in the
amplifier.
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event and they are normally reverse-biased. However, if the
input voltage exceeds the supply voltage, these ESD diodes
can become forward-biased. Without current limiting, excessive
amounts of current may flow through these diodes, causing
permanent damage to the device. If inputs are subject to over-
voltage, insert appropriate series resistors to limit the diode
current to less than 5 mA maximum.
The input stage has two diodes between the input pins to
protect the differential pair. Under high slew rate conditions,
when the op amp is connected as a voltage follower, the diodes
may become forward-biased and the source may try to drive
the output. A small resistor should be placed in the feedback
loop and in the noninverting input. The noise of a 100 Ω
resistor at room temperature is ~1.25 nV/√Hz, which is higher
than the AD8597/AD8599. Thus, there is a tradeoff between
noise performance and protection. If possible, limiting should
be placed earlier in the signal path. For further details, see the
Amplifier Input Protection…Friend or Foe article at
http://www.analog.com/amplifier_input.
Because of the large transistors used to achieve low noise, the
input capacitance may seem rather high. To take advantage of
the low noise performance, impedance around the op amp should
be low, less than 500 Ω. Under these conditions, the pole from
the input capacitance should be greater than 50 MHz, which
does not affect the signal bandwidth.
OUTPUT PHASE REVERSAL
Output phase reversal occurs in some amplifiers when the
input common-mode voltage range is exceeded. As the common-
mode voltage is moved outside the input voltage range, the
outputs of these amplifiers can suddenly jump in the opposite
direction to the supply rail. This is the result of the differential
input pair shutting down that causes a radical shifting of
internal voltages that results in the erratic output behavior.
Rev. C | Page 15 of 20
The AD8597/AD8599 amplifiers have been carefully designed
to prevent any output phase reversal if both inputs are main-
tained within the specified input voltage range. If one or both
inputs exceed the input voltage range but remain within the
supply rails, the op amp specifications, such as CMRR, are not
guaranteed, but the output remains close to the correct value.
NOISE AND SOURCE IMPEDANCE CONSIDERATIONS
The AD8597/AD8599 ultralow voltage noise of 1.1 nV/√Hz is
achieved with special input transistors running at high collector
current. Therefore, it is important to consider the total input-
referred noise (e
voltage noise (e
(√4 kTR
where R
This equation is plotted for the AD8597/AD8599 in Figure 58.
Because optimum dc performance is obtained with matched
source resistances, this case is considered even though it is clear
from Equation 1 that eliminating the balancing source resistance
lowers the total noise by reducing the total R
At a very low source resistance (R
amplifier dominates. As source resistance increases, the Johnson
noise of R
achieved; the current noise component is larger than the
resistor noise.
e
N
100
total = [e
0.1
S
10
S
).
1
is the total input source resistance.
10
S
dominates until a higher resistance of R
N
N
N
), current noise (i
Figure 58. Noise vs. Source Resistance
2
total), which includes contributions from
+ 4 kTR
TOTAL NOISE
SOURCE RESISTANCE (Ω)
100
S
+ (i
N
S
< 50 Ω), the voltage noise of the
× R
N
), and resistor noise
S
)
2
AD8597/AD8599
]
1/2
1k
RESISTOR NOISE
S
by a factor of 2.
ONLY
S
> 2 kΩ is
10k
(1)