AD8034 Analog Devices, AD8034 Datasheet - Page 6

• Manufacturer Part Number: AD8034
• Manufacturer: Analog Devices

Specifications of AD8034

• -3db Bandwidth: 80MHz
• Slew Rate: 80V/µs
• Vos: 1mV
• Ib: 1.5pA
• # Opamps Per Pkg: 2
• Input Noise (nv/rthz): 11nV/rtHz
• Vcc-vee: 5V to 24V
• Isy Per Amplifier: 3.5mA
• Packages: SOIC,SOT

AD8033/AD8034
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8033/AD8034
packages is limited by the associated rise in junction temperature
(T
reaches the junction temperature. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the AD8033/
AD8034. Exceeding a junction temperature of 175°C for an
extended period can result in changes in silicon devices, potentially
causing failure.
The still-air thermal properties of the package and PCB (θ
ambient temperature (T
package (P
The junction temperature can be calculated as
P
dissipated in the package due to the load drive for all outputs.
The quiescent power is the voltage between the supply pins (V
times the quiescent current (I
referenced to midsupply, the total drive power is V
some of which is dissipated in the package and some in the load
(V
the load power is the drive power dissipated in the package
RMS output voltages should be considered. If R
to −V
V
D
S
J
OUT
) on the die. The plastic that encapsulates the die locally
is the sum of the quiescent power dissipation and the power
× I
T
P
P
S
OUT
J
× I
D
D
, as in single-supply operation, the total drive power is
= T
= Quiescent Power + (Total Drive Power − Load Power)
= [V
.
OUT
A
D
) determine the junction temperature of the die.
). The difference between the total drive power and
+ (P
S
× I
S
D
] + [(V
× θ
JA
)
A
S
/2) × (V
), and the total power dissipated in the
S
). Assuming the load (R
OUT
/R
L
)] − [V
OUT
Rating
26.4 V
See Figure 5
26.4 V
1.4 V
−65°C to +125°C
−40°C to +85°C
300°C
L
2
is referenced
/R
S
/2 × I
L
]
L
) is
OUT
JA
),
,
Rev. D | Page 6 of 24
S
)
If the rms signal levels are indeterminate, consider the worst case,
when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ
capacitances at the input leads of high speed op amps as discussed
in the Layout, Grounding, and Bypassing Considerations section.
Figure 5 shows the maximum power dissipation in the package
vs. the ambient temperature for the 8-lead SOIC (125°C/W),
5-lead SC70 (210°C/W), and 8-lead SOT-23 (160°C/W) packages
on a JEDEC standard 4-layer board. θ
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current for
the AD8033/AD8034 will likely cause catastrophic failure.
ESD CAUTION
OUT
P
D
2.0
1.5
1.0
0.5
= V
= (V
OUT
0
–60
SOT-23-8
S
= V
/2.
S
JA
× I
–40
Ambient Temperature for a 4-Layer Board
. Care must be taken to minimize parasitic
Figure 5. Maximum Power Dissipation vs.
S
/4 for R
S
) + (V
SC70-5
–20
AMBIENT TEMPERATURE (°C)
S
L
/4)
to midsupply
SOIC-8
2
0
/R
L
20
L
referenced to V
JA
values are approximations.
40
60
80
S−
, worst case
100
JA
. In