ADP5037 Analog Devices, ADP5037 Datasheet - Page 17

• Manufacturer Part Number: ADP5037
• Description: Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs
• Manufacturer: Analog Devices

Data Sheet
THEORY OF OPERATION
POWER MANAGEMENT UNIT
The
PMU) combining two step-down (buck) dc-to-dc convertors
and two low dropout linear regulators (LDOs). The high
switching frequency and tiny 24-lead LFCSP package allow for a
small power management solution.
To combine these high performance regulators into the micro
PMU, there is a system controller allowing them to operate
together.
The buck regulators can operate in forced PWM mode if the
MODE pin is at a logic high level. In forced PWM mode, the
buck switching frequency is always constant and does not
change with the load current. If the MODE pin is at logic low
level, the switching regulators operate in auto PWM/PSM
mode. In this mode, the regulators operate at fixed PWM
frequency when the load current is above the PSM current
threshold. When the load current falls below the PSM current
threshold, the regulator in question enters PSM, where the
switching occurs in bursts. The burst repetition rate is a
function of the current load and the output capacitor value.
This operating mode reduces the switching and quiescent
PGND1
AVIN
VIN1
SW1
EN1
EN2
EN3
EN4
ADP5037
CONTROL
ENABLE
MODE
AND
is a micropower management units (micro
ADP5037
ANTISHOOT
THROUGH
ENBK1
ENBK2
ENLDO1
ENLDO2
DRIVER
PWM
COMP
I
LOW
CURRENT
LIMIT
AND
CONTROL
AVIN
BUCK1
PWM/
GM ERROR
PSM
VIN3
AMP
SOFT START
UNDERVOLTAGE
ENBK1
COMP
LOCKOUT
PSM
LDO
CONTROL
Figure 45. Functional Block Diagram
LDO
75Ω
VOUT1
Rev. A | Page 17 of 28
UNDERVOLTAGE
OSCILLATOR
SHUTDOWN
LOCKOUT
THERMAL
SYSTEM
FB1 FB2
VOUT2
AGND
75Ω
current losses. The auto PWM/PSM mode transition is
controlled independently for each buck regulator. The two
bucks operate synchronized to each other.
The
ling the activation of each regulator. The regulators are activated
by a logic level high applied to the respective EN pin. EN1 controls
BUCK1, EN2 controls BUCK2, EN3 controls LDO1, and EN4
controls LDO2.
Regulator output voltages are set through external resistor
dividers or can be optionally factory programmed to default
values (see the Ordering Guide section).
When a regulator is turned on, the output voltage ramp rate is
controlled though a soft start circuit to avoid a large inrush
current due to the charging of the output capacitors.
R1
R2
ADP5037
FB3
SOFT START
PSM
COMP
ENBK2
VOUT3
VIN4
has individual enable pins (EN1 to EN4) control-
GM ERROR
AMP
600Ω
CONTROL
BUCK2
PWM/
PSM
AVIN
UNDERVOLTAGE
SEL
MODE
LOCKOUT
Y
OP
B
A
LDO
CONTROL
CURRENT
ENLDO1
MODE2
ANTISHOOT
LDO
THROUGH
COMP
DRIVER
PWM
I
LOW
LIMIT
AND
ENLDO2
FB4
600Ω
R3
R4
ADP5037
VOUT4
VIN2
SW2
PGND2
MODE