TDA7303 STMicroelectronics, TDA7303 Datasheet - Page 13

no-image

TDA7303

Manufacturer Part Number
TDA7303
Description
IC AUDIO PROCESSOR STEREO 28-SOI
Manufacturer
STMicroelectronics
Type
Stereo Audior
Datasheet

Specifications of TDA7303

Applications
Hi-Fi Systems
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA7303
Manufacturer:
ST
0
Part Number:
TDA7303
Manufacturer:
ST
Quantity:
20 000
Part Number:
TDA7303TR
Manufacturer:
ST
Quantity:
20 000
TDA7303
3
3.1
3.2
3.3
3.4
3.5
I
Data transmission from microprocessor to the TDA7303 and viceversa takes place through
the 2 wires I
positive supply voltage must be connected).
Data validity
As shown in
clock. The high and low state of the data line can only change when the clock signal on the
SCL line is lOW.
Start and stop conditions
As shown in
is high. The stop condition is a low to high transition of the SDA line while SCL is high.
Byte format
Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by
an acknowledge bit. The MSB is transferred first.
Acknowledge
The master (μP) puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see
(low) the SDA line during the acknowledge clock pulse, so that the SDA line is stable low
during this clock pulse.
The audioprocessor which has been addressed has to generate an acknowledge after the
reception of each byte, otherwise the SDA line remains at the high level during the ninth
clock pulse time. In this case the master transmitter can generate the stop information in
order to abort the transfer.
Transmission without acknowledge
Avoiding to detect the acknowledge of the audioprocessor, the μP can use a simpler
transmission: simply it waits one clock without checking the slave acknowledging, and sends
the new data.
This approach of course is less protected from misreading and decreases the noise
immunity.
2
C bus interface
Figure
2
Figure
Figure 21
C bus interface, consisting of the two lines SDA and SCL (pull-up resistors to
22). The peripheral (audioprocessor) that acknowledges has to pull-down
20, the data on the SDA line must be stable during the high period of the
a start condition is a high to low transition of the SDA line while SCL
I
2
C bus interface
13/20

Related parts for TDA7303