8XC554 NXP Semiconductors, 8XC554 Datasheet - Page 12
8XC554
Manufacturer Part Number
8XC554
Description
This data sheet describes the 6 clock version of the 8xC554
Manufacturer
NXP Semiconductors
Datasheet
1.8XC554.pdf
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Philips Semiconductors
Dual DPTR
The dual DPTR structure (see Figure 6) is a way by which the chip
will specify the address of an external data memory location. There
are two 16-bit DPTR registers that address the external memory,
and a single bit called DPS = AUXR1/bit0 that allows the program
code to switch between them.
The DPS bit status should be saved by software when switching
between DPTR0 and DPTR1.
2003 Jan 28
80C51 8-bit microcontroller – 6-clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I
high I/O, 64L LQFP
AUXR1
BIT0
DPS
(83H)
DPH
FF
00
Figure 6.
Figure 5. Internal and External Data Memory Address Space with EXTRAM = 0
(82H)
DPL
256 BYTES
ERAM
DPTR1
DPTR0
FF
80
00
EXTERNAL
MEMORY
DATA
INTERNAL RAM
INTERNAL RAM
128 BYTES
128 BYTES
LOWER
UPPER
SU00745A
2
C, PWM, capture/compare,
12
FF
80
00
Note that bit 2 is not writable and is always read as a zero. This
allows the DPS bit to be quickly toggled simply by executing an
INC AUXR1 instruction without affecting the other bits.
DPTR Instructions
The instructions that refer to DPTR refer to the data pointer that is
currently selected using the AUXR1/bit 0 register. The six
instructions that use the DPTR are as follows:
The data pointer can be accessed on a byte-by-byte basis by
specifying the low or high byte in an instruction which accesses the
SFRs. See application note AN458 for more details.
INC DPTR
MOV DPTR, #data16
MOV A, @ A+DPTR
MOVX A, @ DPTR
MOVX @ DPTR , A
JMP @ A + DPTR
FUNCTION
REGISTER
SPECIAL
FFFF
0100
0000
Increments the data pointer by 1
Loads the DPTR with a 16-bit constant
Move code byte relative to DPTR to ACC
Move external RAM (16-bit address) to
ACC
Move ACC to external RAM (16-bit
address)
Jump indirect relative to DPTR
EXTERNAL
MEMORY
DATA
SU00980
80C554/87C554
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