LMC7221BIM5/NOPB National Semiconductor, LMC7221BIM5/NOPB Datasheet - Page 4

• Manufacturer Part Number: LMC7221BIM5/NOPB
• Description: IC COMPAR TINY R-R CMOS SOT23-5
• Manufacturer: National Semiconductor
• Type: General Purposer

Specifications of LMC7221BIM5/NOPB

• Number Of Elements: 1
• Output Type: Open Drain
• Voltage - Supply: 2.7 V ~ 15 V, ±1.35 V ~ 7.5 V
• Mounting Type: Surface Mount
• Package / Case: SC-74A, SOT-753
• Comparator Type: Micropower
• No. Of Comparators: 1
• Response Time: 4µs
• Ic Output Type: CMOS, MOS, Open-Collector / Drain, TTL
• Supply Current: 7µA
• Supply Voltage Range: 2.7V To 15V
• Rohs Compliant: Yes
• Dc: 1142
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMC7221BIM5; LMC7221BIM5TR

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t
t
t
t
rise
fall
PHL
PLH
Symbol
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
the temperature extreme.
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of
Note 4: The maximum power dissipation is a function of T
θ
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Limiting input pin current is only necessary for input voltages which exceed the absolute maximum input voltage rating.
Note 8: Do not short circuit the output to V
Note 9: C
Note 10: Input offset voltage average drift is calculated by dividing the accelerated operating life V
case input conditions and includes the first 30 days of drift.
Note 11: Input step voltage for propagation delay measurement is 2V.
JA
. All numbers apply for packages soldered directly onto a PC Board.
L
includes the probe and test jig capacitance.
Rise Time
Fall Time
Propagation Delay
(High to Low) (Note 10)
Propagation Delay
(Low to High) (Note 10)
Parameter
+
when V
f = 10 kHz, C
Overdrive = 10 mV, 5 kΩ Pullup
f = 10 kHz, C
Overdrive = 10 mV, 5 kΩ Pullup
f = 10 kHz, C
5 kΩ Pullup (Note 8)
V
C
(Note 8)
f = 10 kHz, C
5 kΩ Pullup (Note 8)
V
C
(Note 8)
+
L
+
L
+
= 2.7V, f = 10 kHz,
= 50 pF, 5 kΩ Pullup
= 2.7V, f = 10 kHz,
= 50 pF, 5 kΩ Pullup
is greater than 12V or reliability will be adversely affected.
J(MAX)
, θ
Conditions
JA
L
L
L
L
. The maximum allowable power dissipation at any ambient temperature is P
J
= 50 pF, (Note 8)
= 50 pF, (Note 8)
= 50 pF,
= 50 pF,
= 25˚C, V
±
4
30 mA may adversely affect reliability.
+
10 mV
100 mV
10 mV
100 mV
10 mV
100 mV
10 mV
100 mV
= 5V, V
−
= 0V, V
OS
(Note 5)
drift by the equivalent operational time. This represents worst
Typ
0.3
0.3
10
10
4
4
6
4
7
4
CM
= V
LMC7221AI LMC7221BI
O
(Note 6)
= V
Limit
+
/2. Boldface limits apply at
(Note 6)
Limit
D
= (T
J(MAX)
Units
– T
µs
µs
µs
µs
µs
µs
A
)/