LT1671CS8#TRPBF Linear Technology, LT1671CS8#TRPBF Datasheet - Page 6

IC COMP GRND-SENSNG LOWPWR 8SOIC

LT1671CS8#TRPBF

Manufacturer Part Number
LT1671CS8#TRPBF
Description
IC COMP GRND-SENSNG LOWPWR 8SOIC
Manufacturer
Linear Technology
Type
with Latchr
Datasheet

Specifications of LT1671CS8#TRPBF

Number Of Elements
1
Output Type
CMOS, Complementary, TTL
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIN
LT1671
V
+IN (Pin 2): Noninverting Input.
–IN (Pin 3): Inverting Input.
V
or – 5V.
LATCH ENABLE (Pin 5): Latch Control Pin. When high, the
outputs remain in a latched condition, independent of the
current state of the inputs.
TYPICAL PERFORMANCE CHARACTERISTICS
TI I G DIAGRA S
6
+
U
W
V
(Pin 1): Positive Supply Voltage. Normally 5V.
(Pin 4): Negative Supply Voltage. Normally either 0V
OUT
V
IN
FUNCTIONS
U
+IN
– 95mV
5mV
U
t
5mV Overdrive
V
V
PD
S
OD
V
= 5V
+
IN
= 5mV
Response Time to
U
V
OD
20ns/DIV
W
W
t
PD
U
1671 G18
1.4V
Q OUT
0V
1671 TD01
GND (Pin 6): Ground.
Q OUT (Pin 7): Noninverting Logic Output. This pin is high
when +IN is above – IN and LATCH ENABLE is low.
Q OUT (Pin 8): Inverting Logic Output. This pin is low
when +IN is above – IN and LATCH ENABLE is low.
ENABLE
LATCH
V
OUT
V
IN
+IN
– 95mV
5mV
t
5mV Overdrive
V
V
PD
S
OD
= 5V
= 5mV
Response Time to
t
SU
20ns/DIV
t
PD
t
H
1671 G19
1.4V
Q OUT
0V
1671 TD02

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