ST72321BR9 STMicroelectronics, ST72321BR9 Datasheet - Page 186

• Manufacturer Part Number: ST72321BR9
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72321BR9

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
16 REVISION HISTORY
Table 32. Revision History
186/187
21-Mar-2006
10-Apr-2006
10-Apr-2007
13-Oct-2008
Date
Revision
2
3
4
5
Added
Removed CSS feature in
Updated
on page 177
Updated
Removed blank pages
In
Deleted the sentence in
bled’
In
modes, OCFi and OCMPi are set while the counter value equals the OCiR register value
(see
behavior is the same in OPM or PWM mode."
Removed Compare Register i Latch signal from
Removed EMC protective circuitry in
these components)
Changed Footnote 4 in
Added ‘TIMD set simultaneously with OC interrupt’ in
Added ‘Pull-up always active on PE2’ in
Deleted limitations ‘Halt ActiveHalt Power consumption’ ‘I2C interrupt exit from Halt/Active-
Halt’ and Safe connection of OSC1/OSC2 pins’ in
Title of the document changed
Modified
Modified t
Modified
Values in inches rounded to 4 decimal digits (instead of 3) in
TA” on page 170
Modified
Modified
Modified
TOMER CODE
Table 2
Section 10.4
Figure 50
“32-Pin LQFP Package Pinout” on page 10
“DEVICE ORDERING INFORMATION AND TRANSFER OF CUSTOMER CODE”
“KNOWN LIMITATIONS” on page 186
“Starting the Conversion” on page 129
“Absolute Maximum Ratings (Electrical Sensitivity)” on page 154
“PACKAGE CHARACTERISTICS” on page 170 (Section
“TIMD set simultaneously with OC interrupt” on page 185
Section 14.2 DEVICE ORDERING INFORMATION AND TRANSFER OF CUS-
RET
added note for I/O Port E2 (PE2) output mode “pull-up always activated”
and N
for an example with fCPU/2 and
16-bit timer, replaced text in note 3 with "In both internal and external clock
on
page 176 (Figure 102
RW
Section 12.11.1
values in
Section 4.3.1
“SYSTEM INTEGRITY MANAGEMENT (SI)” on page
Description of Changes
“FLASH Memory” on page 151
Figure 87 on page 159
‘Readout protection is not supported if LVD is ena-
Section 15.1.8
and option list)
Figure 51
Figure
Section 15
Section 15.1.2
51.
for an example with fCPU/4). This
“PACKAGE MECHANICAL DA-
(device works correctly without
13.3)
29.