PM8803 STMicroelectronics, PM8803 Datasheet - Page 21

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PM8803

Manufacturer Part Number
PM8803
Description
High efficiency integrated IEEE 802.3at PoE-PD interface and PWM controller type 2 PSE indicator, plus support for forward active clamp topology
Manufacturer
STMicroelectronics
Datasheet

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PM8803
4.4
4.5
Undervoltage lockout
After classification is completed, the PSE raises the voltage to provide the Power Devices
with the negotiated power. During the transition from low to operating voltage, the internal
UVLO is released and the hot-swap MOSFET is activated, initiating the inrush sequence.
The PM8803 implements the UVLO mechanism by setting 2 internal thresholds on the
voltage across the VDD-VSS pins; one is to activate the hot-swap (V
is to switch off the hot-swap MOSFET upon detection of a supply voltage drop (V
from normal operating conditions.
No additional external components are required to comply with the IEEE requirements. The
thermal protection alarm overrides the gate driving of the MOS, immediately switching off
the MOS itself in case of device overheating. The hot-swap is bypassed also in auxiliary
source
swap MOSFET.
Inrush and DC current limiting
Once the detection and classification phases have been successfully completed, the PSE
raises the voltage across the Ethernet cable. When the voltage difference between VIN and
VSS is greater than the V
and the DC/DC input capacitance is charged in a controlled manner.
During the inrush phase, the current is limited to 140 mA.
When the RTN voltage falls below 1.5 V, an internal signal (PGOOD in
to activate the DC/DC section.
Figure 9.
Ch1: RTN - VSS, Ch2: VDD - VSS, Ch3: Iinput, Ch4: 5Vout (with offset)
topology,
Line transient response
supplying directly the PWM section of the PM8803 and bypassing the hot-
UVLO_R
Doc ID 018559 Rev 1
threshold, the internal hot-swap MOSFET is switched on
UVLO_R
Figure
), while the other
3) is asserted
PD interface
UVLO_F
AM045099v1
21/34
)

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