DS1245W Maxim, DS1245W Datasheet - Page 2

• Manufacturer Part Number: DS1245W
• Description: The DS1245W 3
• Manufacturer: Maxim

DESCRIPTION
The DS1245W 3.3V 1024k Nonvolatile SRAM is a 1,048,576-bit, fully static, nonvolatile SRAM
organized as 131,072 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and
control circuitry which constantly monitors V
occurs, the lithium energy source is automatically switched on and write protection is unconditionally
enabled to prevent data corruption. DIP-package DS1245W devices can be used in place of existing 128k
x 8 static RAMs directly conforming to the popular bytewide 32-pin DIP standard. DS1245W devices in
the PowerCap Module package are directly surface mountable and are normally paired with a DS9034PC
PowerCap to form a complete Nonvolatile SRAM module. There is no limit on the number of write
cycles that can be executed and no additional support circuitry is required for microprocessor interfacing.
READ MODE
The DS1245W executes a read cycle whenever
Enable) and
(A
eight data output drivers within t
that
satisfied, then data access must be measured from the later occurring signal (
parameter is either t
WRITE MODE
The DS1245W executes a write cycle whenever the
inputs are stable. The later occurring falling edge of
The write cycle is terminated by the earlier rising edge of
valid throughout the write cycle.
before another cycle can be initiated. The
cycles to avoid bus contention. However, if the output drivers are enabled (
will disable the outputs in t
DATA RETENTION MODE
The DS1245W provides full functional capability for V
volts. Data is maintained in the absence of V
static RAMs constantly monitor V
write protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As V
falls below approximately 3.0 volts, a power switching circuit connects the lithium energy source to
RAM to retain data. During power-up, when V
switching circuit connects external V
RAM operation can resume after V
FRESHNESS SEAL
Each DS1245W device is shipped from Maxim with its lithium energy source disconnected, guaranteeing
full energy capacity. When V
is enabled for battery back-up operation.
PACKAGES
The DS1245W is available in two packages: 32-pin DIP and 34-pin PowerCap Module (PCM). The 32-
pin DIP integrates a lithium battery, an SRAM memory and a nonvolatile control function into a single
package with a JEDEC-standard 600-mil DIP pinout. The 34-pin PowerCap Module integrates SRAM
0
- A
CE
16
) defines which of the 131,072 bytes of data is to be accessed. Valid data will be available to the
and
OE
OE
(Output Enable) are active (low). The unique address specified by the 17 address inputs
(Output Enable) access times are also satisfied. If
CO
for
CE
ODW
CC
or t
from its falling edge.
is first applied at a level greater than 3.0 volts, the lithium energy source
ACC
OE
WE
CC
CC
for
(Access Time) after the last address input signal is stable, providing
. Should the supply voltage decay, the NV SRAMs automatically
exceeds 3.0 volts.
CC
must return to the high state for a minimum recovery time (t
OE
to RAM and disconnects the lithium energy source. Normal
OE
rather than address access.
CC
CC
control signal should be kept inactive (high) during write
for an out-of-tolerance condition. When such a condition
without any additional support circuitry. The nonvolatile
2 of 10
WE
CC
CE
WE
rises above approximately 2.5 volts, the power
(Write Enable) is inactive (high) and
CC
or
greater than 3.0 volts and write protects by 2.8
and
WE
CE
CE
will determine the start of the write cycle.
or
signals are active (low) after address
WE
OE
. All address inputs must be kept
and
CE
CE
and
CE
or
access times are not
OE
OE
) and the limiting
active) then
CE
DS1245W
(Chip
WE
WR
CC
)