DS1265W Maxim, DS1265W Datasheet - Page 2

• Manufacturer Part Number: DS1265W
• Description: The DS1265W 8Mb nonvolatile (NV) SRAMs are 8,388,608-bit, fully static, NV SRAMs organized as 1,048,576 words by 8-bits
• Manufacturer: Maxim

READ MODE
The DS1265 devices execute a read cycle whenever
Enable) and
(A
eight data output drivers within t
that
access must be measured from the later-occurring signal (
t
WRITE MODE
The DS1265 devices execute a write cycle whenever
inputs are stable. The later-occurring falling edge of
The write cycle is terminated by the earlier rising edge of
valid throughout the write cycle.
before another cycle can be initiated. The
cycles to avoid bus contention. However, if the output drivers are enabled (
will disable the outputs in t
DATA-RETENTION MODE
The DS1265W provides full functional capability for V
Data is maintained in the absence of V
RAMs constantly monitor V
protect themselves, all inputs become “don’t care,” and all outputs become high-impedance. As V
below approximately 2.5V, a power-switching circuit connects the lithium energy source to RAM to
retain data. During power-up, when V
connects external V
resume after V
FRESHNESS SEAL
Each DS1265 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When V
energy source is enabled for battery backup operation.
CO
0
–A
for
CE
19
CE
) defines which of the 1,048,576 bytes of data is accessed. Valid data will be available to the
and
or t
OE
OE
OE
CC
(Output Enable) are active (low). The unique address specified by the 20 address inputs
for
exceeds 3.0V.
access times are also satisfied. If
CC
OE
to RAM and disconnects the lithium energy source. Normal RAM operation can
rather than t
ODW
CC
from its falling edge.
. Should the supply voltage decay, the NV SRAMs automatically write
ACC
WE
(Access Time) after the last address input signal is stable, providing
ACC
must return to the high state for a minimum recovery time (t
CC
CC
.
without any additional support circuitry. The nonvolatile static
OE
rises above approximately 2.5V, the power-switching circuit
CC
control signal should be kept inactive (high) during write
is first applied at a level greater than V
2 of 8
OE
CE
WE
WE
and
CC
or
(Write Enable) is inactive (high) and
CE
greater than 3.0V and write protects by 2.8V.
and
WE
CE
CE
or
will determine the start of the write cycle.
CE
or
access times are not satisfied, then data
OE
WE
signals are active (low) after address
) and the limiting parameter is either
. All address inputs must be kept
CE
and
OE
active), then
TP
, the lithium
CE
DS1265W
CC
(Chip
falls
WE
WR
)