DS2432 Maxim, DS2432 Datasheet - Page 11

• Manufacturer Part Number: DS2432
• Description: The DS2432 combines 1024 bits of EEPROM, a 64-bit secret, an 8-byte register/control page with up to five user read/write bytes, a 512-bit SHA-1 engine, and a fully-featured 1-Wire interface in a single chip
• Manufacturer: Maxim

ABRIDGED DATA SHEET
DS2432
Overdrive Match ROM [69h]
The Overdrive Match ROM command, followed by a 64-bit registration number transmitted at Overdrive
Speed, allows the bus master to address a specific DS2432 on a multidrop bus and to simultaneously set it
in Overdrive Mode. Only the DS2432 that exactly matches the 64-bit number will respond to the
subsequent memory or SHA-1 function command. Slaves already in Overdrive mode from a previous
Overdrive Skip or a successful Overdrive Match command will remain in Overdrive mode. All Over-
drive-capable slaves will return to regular speed at the next Reset Pulse of minimum 480 µs duration. The
Overdrive Match ROM command can be used with a single or multiple devices on the bus.
Resume Command [A5h]
In a typical application the DS2432 needs to be accessed several times to write a full 32-byte page. In a
multidrop environment this means that the 64-bit registration number of a Match ROM command has to
be repeated for every access. To maximize the data throughput in a multidrop environment the Resume
Command function was implemented. This function checks the status of the RC bit and, if it is set,
directly transfers control to the Memory and SHA-1 functions, similar to a Skip ROM command. The
only way to set the RC bit is through successfully executing the Match ROM, Search ROM or Overdrive
Match ROM command. Once the RC bit is set, the device can repeatedly be accessed through the Resume
Command function. Accessing another device on the bus will clear the RC bit, preventing two or more
devices from simultaneously responding to the Resume Command function.
1-Wire SIGNALING
The DS2432 requires strict protocols to ensure data integrity. The protocol consists of four types of sig-
naling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1 and Read Data.
Except for the presence pulse the bus master initiates all these signals. The DS2432 can communicate at
two different speeds, regular speed and Overdrive Speed. If not explicitly set into the Overdrive mode,
the DS2432 will communicate at regular speed. While in Overdrive Mode the fast timing applies to all
waveforms.
The initialization sequence required to begin any communication with the DS2432 is shown in Figure 10.
A Reset Pulse followed by a Presence Pulse indicates the DS2432 is ready to send or receive data. The
bus master transmits (TX) a reset pulse (t
, minimum 480 µs at regular speed, 48 µs at Overdrive
RSTL
Speed). The bus master then releases the line and goes into receive mode (RX). The 1-Wire bus is pulled
to a high state via the pullup resistor. After detecting the rising edge on the data pin, the DS2432 waits
(t
, 15-60 µs at regular speed, 2-6 µs at Overdrive speed) and then transmits the Presence Pulse (t
,
PDH
PDL
60-240 µs at regular speed, 8-24 µs at Overdrive Speed). A Reset Pulse of 480 µs or longer will exit the
Overdrive Mode returning the device to regular speed. If the DS2432 is in Overdrive Mode and the Reset
Pulse is no longer than 80 µs the device will remain in Overdrive Mode.
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