DS1318 Maxim, DS1318 Datasheet - Page 9

• Manufacturer Part Number: DS1318
• Description: The DS1318 parallel-interface elapsed time counter (ETC) is a 44-bit counter that maintains the amount of time that the device operates from main and/or backup power or during an external event
• Manufacturer: Maxim

input current is I
the current. If the oscillator is disabled, the data in the
registers remain static, and the battery input current is
I
tic memory cells.
The DS1318 uses a standard parallel byte-wide interface
to access the register map. Table 1 summarizes the
modes of operation at various power-supply conditions.
The DS1318 uses an external 32.768kHz crystal. The
oscillator circuit does not require any external resistors
or capacitors to operate. Table 2 specifies several crys-
tal parameters for the external crystal, and Figure 1
shows a functional schematic of the oscillator circuit.
An enable bit in the control register controls the oscilla-
tor. Oscillator startup times are highly dependent upon
crystal characteristics, PC board leakage, and layout.
High ESR and excessive capacitive loads are the major
contributors to long startup times. A circuit using a
crystal with the recommended characteristics and
proper layout usually starts within one second.
Table 2. Crystal Specifications*
* The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to Application Note 58: Crystal
Considerations for Dallas Real-Time Clocks for additional specifications.
Figure 1. Oscillator Circuit Showing Internal Bias Network
BATDR
Nominal Frequency
Series Resistance
Load Capacitance
, which is primarily due to the leakage of the sta-
C
L
1
X1
PARAMETER
CRYSTAL
BAT
RTC
Parallel-Interface Elapsed Time Counter
. The oscillator consumes most of
X2
Oscillator Circuit
C
L
2
COUNTDOWN CHAIN
RTC REGISTERS
_____________________________________________________________________
SYMBOL
ESR
C
f
O
L
An external 32.768kHz oscillator can also drive the
DS1318. In this configuration, the X1 pin is connected
to the external oscillator signal and the X2 pin is left
unconnected.
The accuracy of the clock is dependent upon the accu-
racy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and
the capacitive load for which the crystal was trimmed.
Additional error is added by crystal frequency drift
caused by temperature shifts. External circuit noise
coupled into the oscillator circuit can result in the clock
running fast. Figure 2 shows a typical PC board layout
for isolation of the crystal and oscillator from noise. Refer
to Application Note 58: Crystal Considerations with
Dallas Real-Time Clocks for more detailed information.
Figure 2. Layout Example
MIN
LOCAL GROUND PLANE (LAYER 2)
NOTE: AVOID ROUTING SIGNAL LINES
IN THE CROSSHATCHED AREA
(UPPER LEFT QUADRANT) OF
THE PACKAGE UNLESS THERE IS
A GROUND PLANE BETWEEN THE
SIGNAL LINE AND THE DEVICE PACKAGE.
CRYSTAL
32.768
TYP
12.5
MAX
Clock Accuracy
50
GND
X1
X2
UNITS
kHz
kΩ
pF
9