DS1670 Maxim, DS1670 Datasheet - Page 8

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DS1670

Manufacturer Part Number
DS1670
Description
The DS1670 portable system controller is a circuit that incorporates many of the functions necessary for low-power portable products integrated into one chip
Manufacturer
Maxim
Datasheet

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switch by pulling the
to monitor the
rising edge. Upon detecting release, the DS1670 will force the
The third microprocessor monitoring function provided by the DS1670 is a watchdog timer. The
watchdog timer function forces
predetermined time period. The time period is set by the Time Delay (TD) bits in the Watchdog Register.
The time delay can be set to 250ms, 500ms, or 1000ms (see Figure 5). If TD0 and TD1 are both set to 0,
the watchdog timer is disabled. When enabled, the watchdog timer starts timing out from the set time
period as soon as
1000ms time delay. If a high-to-low transition occurs on the
timer is reset and begins to time-out again. If the watchdog timer is allowed to timeout, then the
signal is driven to the active state for 250ms (typical). The
address signals, data signals, and/or control signals. To guarantee that the watchdog timer does not
timeout, a high-to-low transition must occur at or less than the minimum period.
WATCHDOG TIMEOUT CONTROL Figure 5
ANALOG-TO-DIGITAL CONVERTER
The DS1670 provides a 3-channel, 8-bit analog-to-digital converter. The ADC reference voltage (2.55V
typical) is derived from an on-chip band-gap circuit. Three multiplexed analog inputs are provided
through the AIN0, AIN1, and AIN2 pins. The ADC is monotonic (no missing codes) and uses a
successive approximation technique to convert the analog signal into a digital code. An A/D conversion is
the process of assigning a digital code to an analog input voltage. This code represents the input value as
a fraction of the full-scale voltage (FSV) range. Thus, the FSV range is then divided by the ADC into 256
codes (8 bits). The FSV range is bounded by an upper limit equal to the reference voltage and the lower
limit, which is ground. The DS1670 has a FSV of 2.55V (typical) that provides a resolution of 10mV. An
input voltage equal to the reference voltage converts to FFh while an input voltage equal to ground
converts to 00h. The relative linearity of the ADC is ±0.5 LSB.
The ADC selects from one of three different analog inputs (AIN0–AIN2). The input that is selected is
determined by the Analog Input Select (AIS) bits in the Control Register. Table 2 lists the specific analog
WATCHDOG TIMEOUT
WATCHDOG REGISTER
TD1
BIT 7
0
0
1
1
0
TD0
BIT 6
RST
0
1
0
1
0
RST
line. If the line is still low, the DS1670 will continue to monitor the line looking for a
Watchdog disabled
250ms
500ms
1000ms
RST
is inactive. The default setting is for the watchdog timer to be enabled with
BIT 5
WATCHDOG TIMEOUT
line low. After the internal 250ms timer has expired, the DS1670 will continue
0
RST
BIT 4
to the active state when the ST input is not stimulated within the
0
BIT 3
0
8 of 16
BIT 2
0
ST
ST
RST
input can be derived from microprocessor
input pin prior to timeout, the watchdog
BIT 1
TD1
line low and hold it low for 250ms.
BIT 0
TD0
DS1670
RST

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