DS1985 Maxim, DS1985 Datasheet - Page 15

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DS1985

Manufacturer Part Number
DS1985
Description
The DS1985 16Kb Add-Only iButton is a rugged read/write data carrier that identifies and stores relevant information about the product or person to which it is attached
Manufacturer
Maxim
Datasheet

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DS1985
As the DS1985 receives this byte of data into the scratchpad, it also shifts the data into the CRC generator
that has been preloaded with the current address, and the result is a 16-bit CRC of the new data byte and
the new address. After supplying the data byte, the bus master will read this 16-bit CRC from the DS1985
with 16 read time slots to confirm that the address incremented properly and the data byte was received
correctly. If the CRC is incorrect, a Reset Pulse must be issued and the Write Status command sequence
must be restarted. If the CRC is correct, the bus master will issue a programming pulse and the selected
byte in memory will be programmed.
Note that the initial pass through the Write Status flow chart will generate a 16-bit CRC value that is the
result of shifting the command byte into the CRC generator, followed by the 2 address bytes, and finally
the data byte. Subsequent passes through the Write Status flow chart due to the DS1985 automatically
incrementing its address counter will generate a 16-bit CRC that is the result of loading (not shifting) the
new (incremented) address into the CRC generator and then shifting in the new data byte.
For both of these cases, the decision to continue (to apply a Program Pulse to the DS1985) is made
entirely by the bus master, since the DS1985 will not be able to determine if the 16-bit CRC calculated by
the bus master agrees with the 16-bit CRC calculated by the DS1985. If an incorrect CRC is ignored and
a Program Pulse is applied by the bus master, incorrect programming could occur within the DS1985.
Also note that the DS1985 will always increment its internal address counter after the receipt of the eight
read time slots used to confirm the programming of the selected EPROM byte. The decision to continue is
again made entirely by the bus master, therefore if the EPROM data byte does not match the supplied
data byte but the master continues with the Write Status command, incorrect programming could occur
within the DS1985. The Write Status command sequence can be ended at any point by issuing a Reset
Pulse.
To save time when writing more than one consecutive byte of the DS1985s status memory it is possible
to omit reading the 16-bit CRC which allows verification of data and address before the data is copied to
the EPROM memory. This saves 16 time slots or 976 s for every byte to be programmed. This speed-
programming mode is accessed with the command code F5H instead of 55H. It follows basically the
same flow chart as the Write Status command, but skips sending the CRC immediately preceding the
Program Pulse. This command should only be used if the electrical contact between bus master and the
DS1985 is firm since a poor contact may result in corrupted data inside the EPROM status memory.
1-WIRE BUS SYSTEM
The 1-Wire bus is a system that has a single bus master and one or more slaves. In all instances, the
DS1985 is a slave device. The bus master is typically a microcontroller. The discussion of this bus system
is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling
(signal type and timing). A 1-Wire protocol defines bus transactions in terms of the bus state during
specified time slots that are initiated on the falling edge of sync pulses from the bus master. For a more
detailed protocol description, refer to Chapter 4 of the Book of DS19xx iButton Standards.
Hardware Configuration
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have an
open drain connection or 3-state outputs. The DS1985 is an open drain part with an internal circuit
equivalent to that shown in Figure 6. The bus master can be the same equivalent circuit. If a bidirectional
pin is not available, separate output and input pins can be tied together.
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