MAX7306 Maxim, MAX7306 Datasheet - Page 12

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MAX7306

Manufacturer Part Number
MAX7306
Description
The MAX7306/MAX7307 I²C-/SMBus™-compatible, serial-interfaced peripherals feature four level-translating I/Os and operate from a 1
Manufacturer
Maxim
Datasheet

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Part Number:
MAX7306AUB+
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Quantity:
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The MAX7307 features a port supply, V
the logic supplies to all push-pull I/O ports. P2 through
P4 can be configured as push-pull I/O ports (see Figure
3). V
ing the logic-high port load current. V
translation capability for the outputs and operates over a
1.40V to 5.5V voltage independent of the power-supply
voltage, V
Each port of the MAX7307 set as an input can be config-
ured to switch midrail of either the V
supplies. Whenever the port supply reference is
changed from V
register to clear any transition flag on the port.
SMBus/I
GPIOs and LED Drivers
Figure 2. Output Port Structure
Figure 3. Port I/O Structure
12
LA
______________________________________________________________________________________
powers the logic-high port output voltage sourc-
Port Supplies and Level Translation
DD
.
CLOCK
DD
OUTPUT
SELECT
2
INPUT
to V
C Interfaced 4-Port, Level-Translating
LA
, or vice versa, read the port
V
DD
3-BIT PRESCALER
P1
CONFIG26 [4:2]
MAX7307 ONLY
DD
LA
LA
or the V
, that provides
provides level
LA
port
PORT P1
4-BIT BLINK
5-BIT PWM
PORT_[4:0]
PORT_[3:0]
Ports P2 through P4 are overvoltage protected to V
This is true even for a port used as an input with a V
port logic-input threshold. Port P1 is overvoltage pro-
tected to 5.5V, independent of V
3). To mix logic outputs with more than one voltage
swing on a group of ports using the same port supply,
set the port supply voltage (V
put voltage. Use push-pull outputs and port P1 for the
highest voltage ports, and use open-drain outputs with
external pullup resistors for the lower voltage ports. For
the MAX7307, when P2, P3, and P4 ports are acting as
an input referenced to V
is greater than V
PORT_[5]
OUTPUT
SELECT
INPUT
V
DD
P2, P3, P4
DD
0
1
- 0.3V.
V
LA
DD,
MAX7307 ONLY
make sure the V
LA
DD
) to be the highest out-
I/O
and V
PORTS P2
THROUGH P4
LA
(see Figure
LA
voltage
LA
DD
.

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