MAX7318 Maxim, MAX7318 Datasheet - Page 7

• Manufacturer Part Number: MAX7318
• Description: The MAX7318 2-wire-interfaced expander provides 16-bit parallel input/output (I/O) port expansion for SMBus™ and I²C applications
• Manufacturer: Maxim

Each transmission consists of a START condition sent by
a master, followed by the MAX7318 7-bit slave address
plus R/W bit, a register address byte, 1 or more data
bytes, and finally a STOP condition (Figure 3).
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Figure 3. START and STOP Conditions
Figure 4. Bit Transfer
Figure 5. Acknowledge
BY TRANSMITTER
BY RECEIVER
2-Wire-Interfaced, 16-Bit, I/O Port Expander
SDA
SDA
SCL
with Interrupt and Hot-Insertion Protection
START CONDITION
_______________________________________________________________________________________
START and STOP Conditions
S
SDA
SCL
SDA
SCL
CONDITION
START
S
DATA LINE STABLE; DATA VALID CHANGE OF DATA ALLOWED
1
2
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
The acknowledge bit is a clocked 9th bit, which the
recipient uses as a handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX7318, the MAX7318
CLOCK PULSE FOR ACKNOWLEDGMENT
8
CONDITION
STOP
P
Acknowledge
9
Bit Transfer
7