MAX7323 Maxim, MAX7323 Datasheet - Page 7

• Manufacturer Part Number: MAX7323
• Description: The MAX7323 2-wire serial-interfaced peripheral features eight I/O ports
• Manufacturer: Maxim

Address inputs AD0 and AD2 determine the MAX7323
slave address, select which inputs have pullup resis-
tors, and set the default logic state on outputs. Pullups
are enabled on the input ports in groups of two (see
Table 3). The MAX7319, MAX7321, MAX7322, and
MAX7323 use a different range of slave addresses
(110xxxx) than the MAX7320 (101xxxx).
The MAX7323 slave address is determined on each I
transmission, regardless of whether the transmission is
actually addressing the MAX7323. The MAX7323 distin-
guishes whether address inputs AD2 and AD0 are con-
nected to SDA or SCL instead of fixed logic levels V+ or
GND during this transmission. Therefore, the MAX7323
slave address can be configured dynamically in the
application without cycling the device supply.
On initial power-up, the MAX7323 cannot decode
address inputs AD2 and AD0 fully until the first I
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
address selection determines the power-up default
states of the output ports and I/O port initial logic state,
and whether pullups are enabled. However, at power-
up, the I
impedance at the pins of every device (master or slave)
Table 2. Read and Write Access to Eight-Port Expander Family
MAX7319
MAX7320
MAX7321
MAX7322
MAX7323
MAX7328
MAX7329
Slave Address and Input Pullup Selection
PART
2
C SDA and SCL bus interface lines are high
I
I
ADDRESS
2
110xxxx
101xxxx
110xxxx
110xxxx
110xxxx
0100xxx
0111xxx
C SLAVE
2
C Port Expander with 4 Push-Pull Outputs
_______________________________________________________________________________________
INPUTS
Up to 8
Up to 4
Up to 8
Up to 8
—
8
4
INTERRUPT
MASK
Yes
Yes
—
—
—
—
—
OUTPUTS
Up to 8
Up to 4
Up to 8
Up to 8
OPEN-
DRAIN
—
—
—
2
2
C
C
connected to the bus, including the MAX7323. This is
guaranteed as part of the I
address inputs AD2 and AD0 that are connected to
SDA or SCL normally appear at power-up to be con-
nected to V+. The pullup selection logic uses AD0 to
select whether pullups are enabled for ports P2 and P3,
and to set the initial logic state for O0 and O1. AD2
selects whether pullups are enabled for ports P4 and
P5 and sets the initial logic state for O6 and O7. The
rule is that a logic-high, SDA, or SCL connection
selects the pullups and sets the default logic state to
high. A logic-low deselects the pullups and sets the
default logic state low (see Table 3). The port configu-
ration is correct on power-up for a standard I
uration, where SDA or SCL are pulled up to V+ by the
external I
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true—for example,
in applications in which there is legitimate bus activity
during power-up. Also, if SDA and SCL are terminated
with pullup resistors to a different supply voltage than
the MAX7323’s supply voltage, and if that pullup supply
rises later than the MAX7323’s supply, then SDA or SCL
may appear at power-up to be connected to GND. In
such applications, use the four address combinations
that are selected by connecting address inputs AD2
OUTPUTS
PUSH-
PULL
and 4 Open-Drain I/Os
—
—
—
—
8
4
4
2
C pullup resistors.
I
<O7, O6 outputs,
2
<I7–I0 interrupt
<port outputs>
C DATA WRITE
I5–I2 interrupt
mask, O1, O0
<O7–O0 port
<P7–P0 port
<P7–P0 port
<P7–P0 port
outputs>
outputs>
outputs>
outputs>
outputs>
mask>
2
C specification. Therefore,
<O7, O6, P5–P2, O1, O0 port
<0, 0, P5–P2 transition flags,
<O7, O6, I5–I2, O1, O0 port
<0, 0, I5–I2 transition flags,
<P7–P0 transition flags>
<I7–I0 transition flags>
<O7-O0 port inputs>
<P7–P0 port inputs>
<P7–P0 port inputs>
<P7–P0 port inputs>
<I7–I0 port inputs>
I
2
C DATA READ
inputs>
inputs>
0, 0>
0, 0>
2
C config-
7