MAX7324 Maxim, MAX7324 Datasheet - Page 8

• Manufacturer Part Number: MAX7324
• Description: The MAX7324 2-wire serial-interfaced peripheral features 16 I/O ports that are divided into eight push-pull outputs and eight inputs
• Manufacturer: Maxim

I
and Eight Inputs
Table 2. MAX7324 Address Map for Inputs I0–I7
address selection determines which inputs have
pullups applied. However, at power-up, the I
and SCL bus interface lines are high impedance at the
inputs of every device (master or slave) connected to
the bus, including the MAX7324. This is guaranteed as
part of the I
AD0 and AD2 that are connected to SDA or SCL during
power-up appear to be connected to V+. The pullup
selection logic uses AD0 to select whether pullups are
enabled for ports I0–I3, and uses AD2 to select whether
pullups are enabled for ports I4–I7. The rule is that a
logic-high SDA, or SCL connection selects the pullups,
while a logic-low deselects the pullups (Table 2). The
pullup configuration is correct on power-up for a stan-
dard I
up to V+ by the external I
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true—for example,
in applications in which there is legitimate bus activity
during power-up. Also, if SDA and SCL are terminated
with pullup resistors to a different supply voltage than
the MAX7324’s supply voltage, and if that pullup supply
rises later than the MAX7324’s supply, then SDA or
SCL may appear at power-up to be connected to GND.
In such applications, use the four address combina-
tions that are selected by connecting address inputs
AD0 and AD2 to V+ or GND (shown in bold in Tables 2
8
PIN CONNECTION
2
GND
GND
GND
GND
AD2
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
V+
V+
V+
V+
_______________________________________________________________________________________
C Port Expander with Eight Push-Pull Outputs
2
C configuration, where SDA and SCL are pulled
2
GND
GND
GND
GND
AD0
SCL
SDA
SCL
SDA
SCL
SDA
SCL
SDA
C specification. Therefore, address inputs
V+
V+
V+
V+
A6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
C pullups.
A5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DEVICE ADDRESS
A4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2
C SDA
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
and 3). These selections are guaranteed to be correct
at power-up, independent of SDA and SCL behavior. If
one of the other 12 address combinations is used, an
unexpected combination of pullups might be asserted
until the first I
sarily the MAX7324) is put on the bus.
Port inputs switch at CMOS logic levels as determined
by the expander’s supply voltage, and are overvoltage
tolerant to +6V, independent of the device’s supply
voltage.
All eight input ports are monitored for changes since
the expander was last accessed through the serial
interface. The state of the input ports is stored in an
internal “snapshot” register for transition monitoring.
The snapshot is continuously compared with the actual
input conditions, and if a change is detected for any
port input, then an internal transition flag is set for that
port. The eight port inputs are sampled (internally
latched into the snapshot register) and the old transi-
tion flags cleared during the I
MAX7324 read and write access. The previous port
transition flags are read through the serial interface as
the second byte of a 2-byte read sequence.
—
—
—
—
I7
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
I6
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2
C transmission (to any device, not neces-
40kΩ INPUT PULLUP ENABLED
Port-Input Transition Detection
—
—
—
—
I5
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
I4
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2
C acknowledge of every
—
—
—
—
I3
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
I2
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Port Inputs
—
—
—
—
I1
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
I0
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y