FAN400A Fairchild Semiconductor, FAN400A Datasheet - Page 9

• Manufacturer Part Number: FAN400A
• Description: This highly integrated PWM controller provides several features to enhance the performance of low-power flyback converters
• Manufacturer: Fairchild Semiconductor

© 2008 Fairchild Semiconductor Corporation
FAN400A Rev. 1.0.2
Operation Description
FAN400A devices integrate many useful functions for
low-power switch-mode power supplies. The following
descriptions highlight the key features of the FAN400A.
Startup Current
The required startup current is only 8μA. This allows a
high-resistance, low-wattage startup resistor to supply
the controller’s startup power. A 1.5 MΩ/0.25W startup
resistor can be used over a wide input range (100V-
240V
Operating Current
The operating current is normally 3.6mA, which results
in higher efficiency and reduces the required V
up capacitance. A 10μF/25V V
be used over a wide input range (100V-240V
very little power loss.
Green-Mode Operation
The proprietary green-mode function provides off-time
modulation to linearly decrease the switching frequency
under light-load and zero-load conditions. The on-time
is limited to provide better protection against brownouts
and other abnormal conditions. Power supplies using
the FAN400A can meet international restrictions
regarding standby power-consumption.
Constant Voltage (CV) and Constant
Current (CC) without Feedback
The FAN400A can tightly regulate the output voltage
and provide over-current protection without requiring
secondary-side feedback signals. For improved CV and
CC accuracy, the transformer leakage inductance
should be reduced as much as possible.
Over-Temperature Protection (OTP)
The FAN400A has a built-in temperature sensing circuit
to
temperature exceeds 140°C. While PWM output is shut
down, the V
voltage. Some of the internal circuits are shut down,
and V
reaches 17V, all the internal circuits, including the
temperature sensing circuit, operate normally. If the
junction temperature is still higher than 140°C, the
PWM controller shuts down immediately. This situation
continues until the temperature drops below 110°C. The
PWM output is then turned back on. The temperature
hysteresis window for the OTP circuit is 30°C.
V
V
from over-voltage conditions. When V
PWM output is shut down. Over-voltage conditions may
be caused by an open photo-coupler loop or a short
circuit in the output.
DD
DD
shut
over-voltage clamping is built in to prevent damage
Over-Voltage Clamping
AC
DD
) with very little power loss.
gradually starts increasing again. When V
down
DD
voltage gradually drops to the UVLO
PWM
output
DD
hold-up capacitor can
once
DD
exceeds 22.7V,
the
DD
AC
junction
) with
hold-
DD
9
Oscillator Operation
The oscillation frequency is fixed at 65KHz.
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on
spike occurs at the sense-resistor. To avoid premature
termination of the switching pulse, a 310ns leading-
edge blanking time is built in. Conventional RC filtering
is not necessary. During this blanking period, the
current-limit comparator is disabled and cannot switch
off the gate drive.
Constant Output Power Limit
When the SENSE voltage across the sense resistor R
reaches the threshold voltage (around 1.0V), the output
GATE drive is turned off following a small propagation
delay, t
additional
propagation delay is nearly constant regardless of the
input line voltage V
larger additional currents. Under high input-line voltages
the output power limit is higher than under low input-line
voltages. Over a wide range of AC input voltages, the
variation can be significant. To compensate for this, the
threshold voltage is adjusted by adding a positive ramp
(V
1.01V and flattens out at 1.01V. A smaller threshold
voltage forces the output GATE drive to terminate
earlier, reducing total PWM turn-on time and making the
output power equal to that of the low line input. This
proprietary internal compensation feature ensures a
constant output power limit over a wide range of AC
input voltages (90V
Under Voltage Lockout (UVLO)
The turn-on/turn-off thresholds are fixed internally at
17V and 8V. To enable the FAN400A during startup, the
hold-up capacitor must first be charged to 17V through
the startup resistor. The hold-up capacitor continues to
supply V
auxiliary winding of the main transformer. V
drop below 8V during this startup process. This UVLO
hysteresis window ensures that the hold-up capacitor
can adequately supply V
Gate Output
The BiCMOS output stage is a fast totem-pole gate
driver. Cross-conduction is avoided to minimize heat
dissipation, increase efficiency, and enhance reliability.
The output driver is clamped by an internal 17V Zener
diode to protect the power MOSFET transistors against
any harmful over-voltage gate signals.
limit_ramp
PD
). This ramp signal can vary from 0.73V to
DD
. This propagation delay introduces an
current
before energy can be delivered from the
IN
AC
. Higher input line voltages result in
proportional to t
to 264V
DD
during startup.
AC
).
PD
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DD
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