TLE 4269GM Infineon Technologies, TLE 4269GM Datasheet - Page 5

• Manufacturer Part Number: TLE 4269GM
• Manufacturer: Infineon Technologies

Specifications of TLE 4269GM

• Packages: PG-DSO-14
• Regulator Type: single output
• Output Voltage: 5V
• Accuracy: 2.0 %
• Max. Output Current: 100mA
• Dropout Voltage: 250mV

Circuit Description
The control amplifier compares a reference voltage, made highly accurate by resistance
balancing, with a voltage proportional to the output voltage and drives the base of the
series PNP transistor via a buffer. Saturation control as a function of the load current
prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor
equal
greater than the reset threshold
condition’) a fast discharge of the delay capacitor
lower than
The time gap for the delay capacitor discharge is the reset reaction time
The reset threshold
the pin RADJ. In this case the reset condition is reached if
V
V
the reset threshold can be decreased down to 3.5 V. If the reset-adjust-option is not
needed the RADJ-pin should be connected to GND causing the reset threshold to go to
its default value (typ. 4.65 V).
A built in comparator compares the signal of the pin SI, normally fed by a voltage divider
from the input voltage, with the reference and gives an early warning on the pin SO. It is
also possible to superwise another voltage e.g. of a second regulator, or to build a
watchdog circuit with few external components.
Application Description
The input capacitor
approx. 1
capacitance can be damped. The output capacitor
regulating circuit. Stability is guaranteed at values 10 F and an ESR 10
operating temperature range. For small tolerances of the reset delay the spread of the
capacitance of the delay capacitor and its temperature coefficient should be noted.
Data Sheet
RADJ
THRES
<
V
=
UD
V
V
RAQDJ, TH
. The delay capacitor
RADJ,TH
V
in series with
LD
the reset output RO is set to low-level.
. Dimensioning the voltage divider
C
(
V
R
I
RT
ADJ1
is necessary for compensating line influences. Using a resistor of
can be decreased via an external voltage divider connected to
C
+
I
, the oscillating circuit consisting of input inductivity and input
R
ADJ2
C
V
) /
D
RT
R
is charged with the current
. If the output voltage gets lower than
ADJ2
,
5
C
C
Q
(Figure
D
is necessary for the stability of the
sets in and as soon as
5) according to:
I
D
for output voltages
Rev. 2.4, 2007-03-20
C
t
V
RR
D
Q
is greater or
.
TLE 4269
<
V
within the
RT
V
V
RT
(‘reset
D
gets
and
(1)