TLE 4271-2G Infineon Technologies, TLE 4271-2G Datasheet - Page 11

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TLE 4271-2G

Manufacturer Part Number
TLE 4271-2G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 4271-2G

Packages
PG-TO263-7
Regulator Type
single output
Output Voltage
5V
Accuracy
2.0 %
Max. Output Current
550mA
Dropout Voltage
350mV
Application Description
The IC regulates an input voltage in the range of 6 V <
26 V it produces a regulated output current of more than 550 mA. Above 26 V the save-
operating-area protection allows operation up to 36 V with a regulated output current of
more than 300 mA. Overvoltage protection limits operation at 42 V. The overvoltage
protection hysteresis restores operation if the input voltage has dropped below 36 V. The
IC can be switched off via the inhibit input, which causes the quiescent current to drop
below 10 A. A reset signal is generated for an output voltage of
watchdog circuit monitors a connected controller. If there is no positive-going edge at the
watchdog input within a fixed time, the reset output is set to low. The delay for power-on
reset and the maximum permitted watchdog-pulse period can be set externally with a
capacitor.
Design Notes for External Components
An input capacitor
circuit consisting of lead inductance and input capacitance can be damped by a resistor
of approx. 1
the regulating circuit. Stability is guaranteed at values of
< 3 .
Reset Circuitry
If the output voltage decreases below 4.5 V, an external capacitor
discharged by the reset generator. If the voltage on this capacitor drops below
reset signal is generated on pin RO, i.e. reset output is set low. If the output voltage rises
above the reset threshold,
reset time the voltage on the capacitor reaches
again. The value of the power-on-reset time can be set within a wide range depending
of the capacitance of
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
C
t
Definitions:
Data Sheet
D
d
=
which can be calculated as follows:
C
t
I
V
D
D
C
V
UD
D
= reset delay time
D
= charge current, typical 14 A
= delay capacitor
=
= upper delay timing threshold at
V
UD
V
/
, typical 1.8 V
I
D
in series with
C
I
C
is necessary for compensation of line influences. The resonant
D
.
C
D
C
will be charged with constant current. After the power-on-
I
. An output capacitor
C
11
D
for reset delay time
V
DU
and the reset output will be set high
C
Q
V
I
is necessary for the stability of
< 40 V to
C
Q
22 F and an ESR of
V
C
Rev. 2.7, 2007-06-25
Qnom
D
V
Q
on pin D will be
= 5.0 V. Up to
< 4.5 V. The
TLE 4271-2
V
DRL
(1)
, a

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