SAB C165-LM Infineon Technologies, SAB C165-LM Datasheet - Page 13

• Manufacturer Part Number: SAB C165-LM
• Manufacturer: Infineon Technologies

Specifications of SAB C165-LM

• Packages: PG-MQFP-100
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte

Table 2
Symbol Pin Nr
RSTIN
RST
OUT
NMI
Data Sheet
TQFP
79
80
81
Pin Definitions and Functions (cont’d)
Pin Nr
MQFP
81
82
83
Input
Outp.
I/O
O
I
Function
Reset Input with Schmitt-Trigger characteristics. A
low level at this pin while the oscillator is running
resets the C165. An internal pullup resistor permits
power-on reset using only a capacitor connected to
V
Input pulses >100 ns safely pass the filter. The
minimum duration for a safe recognition should be
100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit
BDRSTEN in register SYSCON) the RSTIN line is
internally pulled low for the duration of the internal
reset sequence upon any reset (HW, SW, WDT).
See note below this table.
Note: To let the reset configuration of PORT0 settle
Internal Reset Indication Output. This pin is set to a
low level when the part is executing either a
hardware-, a software- or a watchdog timer reset.
RSTOUT remains low until the EINIT (end of
initialization) instruction is executed.
Non-Maskable Interrupt Input. A high to low
transition at this pin causes the CPU to vector to the
NMI trap routine. When the PWRDN (power down)
instruction is executed, the NMI pin must be low in
order to force the C165 to go into power down mode.
If NMI is high, when PWRDN is executed, the part
will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
SS
. A spike filter suppresses input pulses < 10 ns.
a reset duration of ca. 1 ms is recommended.
9
V2.0, 2000-12
C165