SAK-C167CS-4R40M CA+ Infineon Technologies, SAK-C167CS-4R40M CA+ Datasheet - Page 77

no-image

SAK-C167CS-4R40M CA+

Manufacturer Part Number
SAK-C167CS-4R40M CA+
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAK-C167CS-4R40M CA+

Packages
PG-MQFP-144
Max Clock Frequency
40.0 MHz
Sram (incl. Cache)
11.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
32.0 KByte
Figure 22
Notes
1)
2)
3)
Data Sheet
The C167CS will complete the currently running bus cycle before granting bus access.
This is the first possibility for BREQ to get active.
The CS outputs will be resistive high (pullup) after
the output drivers are switched off.
CLKOUT
HOLD
HLDA
BREQ
CS
Other
Signals
External Bus Arbitration, Releasing the Bus
tc
28
1)
t
73
33
. Latched CS outputs are driven high for 1 TCL before
tc
tc
30
33
tc
tc
3)
29
31
2)
C167CS-4R
V2.2, 2001-08
C167CS-L
MCT04421

Related parts for SAK-C167CS-4R40M CA+