AT45DB321B ATMEL Corporation, AT45DB321B Datasheet

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... Commercial and Industrial Temperature Ranges Description The AT45DB321B is a 2.7-volt only, serial interface Flash memory ideally suited for a wide variety of digital voice-, image-, program code- and data-storage applications. Its 34,603,008 bits of memory are organized as 8192 pages of 528 bytes each. In addition to the main memor y, the AT45DB321B also contains two SRAM data buffers of 528 bytes each ...

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... VCC GND RDY/BUSY To provide optimal flexibility, the memory array of the AT45DB321B is divided into three levels of granularity comprising of sectors, blocks, and pages. The Memory Architecture Diagram illustrates the breakdown of each level and details the number of pages per sector and block. All program operations to the DataFlash occur on a page-by-page basis ...

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... Continuous Array Read command can be utilized to sequentially read a continuous stream of data from the device by simply providing a clock signal; no additional addressing information or control signals need to be provided. The DataFlash incorporates an internal address counter that will automatically increment on every clock AT45DB321B PAGE ARCHITECTURE 8 Pages PAGE 0 ...

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... AT45DB321B 4 cycle, allowing one continuous read operation without the need of additional address sequences. To perform a continuous read, an opcode of 68H or E8H must be clocked into the device followed by 24 address bits and 32 don’t care bits. The first bit of the 24-bit address sequence is reserved for upward and downward compatibility to larger and smaller density devices (see Notes under “ ...

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... The device density is indicated using bits and 2 of the status register. For the AT45DB321B, the four bits are and 1. The decimal value of these four binary bits does not equate to the device density; the four bits represent a combinational code relating to differing densities of Serial DataFlash devices, allowing a total of sixteen dif- ferent density configurations ...

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... AT45DB321B 6 BUFFER TO MAIN MEMORY PAGE PROGRAM WITHOUT BUILT-IN ERASE: A previously erased page within main memory can be programmed with the contents of either buffer 1 or buffer 2. To start the operation, an 8-bit opcode, 88H for buffer 1 or 89H for buffer 2, must be followed by the one reserved bit, 13 address bits (PA12 - PA0) that specify the page in the main memory to be written, and ten additional don’ ...

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... The operation is internally self-timed and should take place in a maximum time of t register will indicate that the part is busy. AT45DB321B . During EP ), the status XFR ...

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... Operation Mode Summary Pin Descriptions AT45DB321B sector is programmed or reprogrammed sequentially page-by-page, then the pro- gramming algorithm shown in Figure 1 on page 26 is recommended. Otherwise, if multiple bytes in a page or several pages are programmed randomly in a sector, then the programming algorithm shown in Figure 2 on page 27 is recommended. Each page within a sector must be updated/rewritten at least once within every 10,000 cumulative page erase/program operations in that sector ...

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... SPI Mode 3. In addition, the SO pin will high-impedance state, and a high-to-low transition on the CS pin will be required to start a valid instruc- tion. The SPI mode will be automatically selected on every falling edge sampling the inactive clock state. AT45DB321B 9 ...

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... Auto Page Rewrite through Buffer 2 Note: In Tables 2 and 3, an SCK mode designation of “Any” denotes any one of the four modes of operation (Inactive Clock Polarity Low, Inactive Clock Polarity High, SPI Mode 0, or SPI Mode 3). AT45DB321B 10 SCK Mode Inactive Clock Polarity Low or High ...

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... N/A N AT45DB321B Address Byte ...

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... This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. AT45DB321B 0°C to 70°C -40°C to 85°C 2.7V to 3.6V Min Typ Max ...

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... Page Erase and Programming Time EP t Page Programming Time P t Page Erase Time PE t Block Erase Time BE t RESET Pulse Width RST t RESET Recovery Time REC 2223D–DFLASH–10/02 AT45DB321B AT45DB321B Min Max Units 20 MHz 20 MHz 250 ns 250 ns 250 ns 200 ...

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... AC Waveforms Waveform 1 – Inactive Clock Polarity Low and SPI Mode 0 CS SCK HIGH IMPEDANCE SO SI Waveform 2 – Inactive Clock Polarity High and SPI Mode CSS SCK HIGH AT45DB321B 14 2.4V AC 2.0 DRIVING 0.8 LEVELS 0.45V < (10 DEVICE UNDER ...

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... For densities larger than 32M bits, the “r” bits become the most significant Page Address bit for the appropriate density. 2223D–DFLASH–10/02 SI CMD 8 bits 8 bits Page Address Byte/Buffer Address (PA12-PA0) (BA9-BA0/BFA9-BFA0) AT45DB321B t t REC CSS t RST HIGH IMPEDANCE 8 bits LSB 15 ...

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... CMD Buffer to Main Memory Page Program (Data from Buffer Programmed into Flash Page Each transition represents 8 bits and 8 clock cycles AT45DB321B 16 The following block diagram and waveforms illustrate the various write sequences available. FLASH MEMORY ARRAY MAIN MEMORY PAGE PROGRAM ...

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... MAIN MEMORY PAGE READ I/O INTERFACE SO PA5-0, BA9-8 BA7-0 X Starts reading page data into buffer CMD r , PA12-6 PA5-0, XX CMD X X···X, BFA9-8 BFA7-0 AT45DB321B MAIN MEMORY PAGE TO BUFFER 2 BUFFER 2 (528 BYTES) BUFFER 2 READ n 1st byte read ...

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... Detailed Bit-level Read Timing – Inactive Clock Polarity Low Continuous Array Read (Opcode: 68H) CS SCK HIGH-IMPEDANCE SO Main Memory Page Read (Opcode: 52H) CS SCK COMMAND OPCODE AT45DB321B DATA OUT ...

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... HIGH-IMPEDANCE SO 2223D–DFLASH–10/ HIGH-IMPEDANCE COMMAND OPCODE AT45DB321B DATA OUT D 7 MSB STATUS REGISTER OUTPUT MSB ...

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... Detailed Bit-level Read Timing – Inactive Clock Polarity High Continuous Array Read (Opcode: 68H) CS SCK HIGH-IMPEDANCE SO Main Memory Page Read (Opcode: 52H) CS SCK COMMAND OPCODE AT45DB321B DATA OUT HIGH-IMPEDANCE ...

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... HIGH-IMPEDANCE SO 2223D–DFLASH–10/ HIGH-IMPEDANCE COMMAND OPCODE AT45DB321B DATA OUT MSB STATUS REGISTER OUTPUT MSB LSB 44 ...

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... Detailed Bit-level Read Timing – SPI Mode 0 Continuous Array Read (Opcode: E8H) CS SCK HIGH-IMPEDANCE SO Main Memory Page Read (Opcode: D2H) CS SCK COMMAND OPCODE AT45DB321B DATA OUT ...

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... HIGH-IMPEDANCE SO 2223D–DFLASH–10/ HIGH-IMPEDANCE AT45DB321B DATA OUT MSB STATUS REGISTER OUTPUT MSB D 4 ...

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... Detailed Bit-level Read Timing – SPI Mode 3 Continuous Array Read (Opcode: E8H) CS SCK HIGH-IMPEDANCE SO Main Memory Page Read (Opcode: D2H) CS SCK COMMAND OPCODE AT45DB321B DATA OUT HIGH-IMPEDANCE ...

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... HIGH-IMPEDANCE SO 2223D–DFLASH–10/ HIGH-IMPEDANCE COMMAND OPCODE AT45DB321B DATA OUT MSB STATUS REGISTER OUTPUT MSB LSB 44 ...

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... A page can be written using either a Main Memory Page Program operation or a Buffer Write operation followed by a Buffer to Main Memory Page Program operation. 3. The algorithm above shows the programming of a single page. The algorithm will be repeated sequentially for each page within the entire array. AT45DB321B 26 START provide address ...

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... X X • • • • • • • • • AT45DB321B If planning to modify multiple bytes currently stored within a page of the Flash array PA6 PA5 PA4 PA3 • ...

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... Wide, Plastic Gull Wing Small Outline Package (SOIC) 32T 32-lead, Plastic Thin Small Outline Package (TSOP) AT45DB321B 28 Ordering Code AT45DB321B-CC AT45DB321B-RC AT45DB321B-TC AT45DB321B-CI AT45DB321B-RI AT45DB321B-TI Package Type Package Operation Range 44C1 Commercial 28R (0°C to 70°C) 32T 44C1 ...

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... 8.0 (0.315 1.00 (0.0394) BSC NON-ACCUMULATIVE BOTTOM VIEW TITLE 44C1, 44-ball ( Array 1.2 mm Body, 1.0 mm Ball Pitch Chip-scale Ball Grid Array Package (CBGA) AT45DB321B SIDE VIEW 0.25 (0.010)MIN 1.20 (0.047) MAX 2.00 (0.079)REF 0.40 (0.016) DIA BALL TYP DRAWING NO. 04/11/01 REV. 44C1 A 29 ...

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... This package conforms to JEDEC reference MO-142, Variation BD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT45DB321B 30 PIN SEATING PLANE ...

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... Mold Flash or protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 2223D–DFLASH–10/ TITLE 28R, 28-lead, 0.330" Body Width, Plastic Gull Wing Small Outline (SOIC) AT45DB321B COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 2.39 – 2.79 A1 0.002 – 0.014 D 18 ...

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... Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...