74LCXZ16244MTDX Fairchild Semiconductor, 74LCXZ16244MTDX Datasheet
74LCXZ16244MTDX
Specifications of 74LCXZ16244MTDX
Related parts for 74LCXZ16244MTDX
74LCXZ16244MTDX Summary of contents
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... Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 1) [TAPE and REEL] Note 1: Use this Order Number to receive devices in Tape and Reel. © 2005 Fairchild Semiconductor Corporation Features 5V tolerant inputs and outputs Guaranteed power up/down high impedance Supports live insertion/withdrawal Outputs have equivalent 26 2.7V– ...
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Connection Diagram Truth Tables Inputs OE I – Inputs OE I – HIGH Voltage Level L LOW Voltage Level X Immaterial ...
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Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...
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DC Electrical Characteristics Note 5: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL t Data to Output PLH t Output Enable Time PZL t PZH t Output Disable Time PLZ t PHZ t Output ...
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AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C 6V for Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; f ...
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Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...