74VHC245MTC Fairchild Semiconductor, 74VHC245MTC Datasheet - Page 3

• Manufacturer Part Number: 74VHC245MTC
• Description: IC TRANSCVR 3-ST 8BIT 20TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74VHCr

Specifications of 74VHC245MTC

• Logic Type: Transceiver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Logic Family: VHC
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Propagation Delay Time: 19ns
• Number Of Elements: 1
• Number Of Channels: 8
• Input Logic Level: CMOS
• Output Logic Level: CMOS
• Output Type: 3-State
• Package Type: TSSOP
• Polarity: Non-Inverting
• Logical Function: Bus Transceiver
• Operating Supply Voltage (min): 2V
• Operating Supply Voltage (max): 5.5V
• Technology: CMOS
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

V
(Note 3)
V
V
V
t
t
t
t
t
t
t
t
C
(T/R, OE)
C
C
PLH
PHL
PZL
PZH
PLZ
PHZ
OSLH
OSHL
Noise Characteristics
Note 3: Parameter guaranteed by design.
AC Electrical Characteristics
Note 4: Parameter guaranteed by design. t
Note 5: C
operating current can be obtained by the equation: I
OLP
OLV
IHD
ILD
IN
I/O
PD
Symbol
(Note 3)
(Note 3)
(Note 3)
Symbol
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
Quiet Output Maximum
Dynamic V
Quiet Output Minimum
Dynamic V
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
Propagation Delay
Time
3-STATE Output
Enable Time
3-STATE Output
Disable Time
Output to Output
Skew
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
Parameter
OL
OL
Parameter
OSLH
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
V
(V)
CC
r
r
r
r
r
r
r
r
|t
PLH max
CC
0.3
0.5
0.3
0.5
0.3
0.5
0.3
0.5
(opr.)

Min
t
PLH min
V
C
5.0
5.0
5.0
5.0
(V)
CC
PD
* V
|; t
CC
T
OSHL
A
* f
11.0
11.5
Typ
5.8
8.3
4.0
5.5
8.5
5.8
7.3
7.0
21
IN
4
8
25

Typ
0.9
3
0.9

|t
q
I
PHL max
C
CC
T
A
/8 (per Bit).
25
Max
11.9
13.2
16.7
10.6
15.8
8.4
5.5
7.5
8.5
9.7
1.5
1.0

10
q
Limits
t
C
PHL min

1.2
3.5
1.5
1.2
|
T
A
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0

Units
40
V
V
V
V
q
C to
Max
10.0
13.5
15.5
19.0
10.0
12.0
18.0
11.0

6.5
8.5
1.5
1.0
10
85
C
C
C
C
L
L
L
L
q
C
50 pF
50 pF
50 pF
50 pF
Units
pF
pF
pF
ns
ns
ns
ns
ns
ns
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Conditions
R
R
(Note 4)
V
V
(Note 5)
L
L
CC
CC
1 k
1 k
Conditions
Open
5.0V
:
:
C
C
C
C
C
C
C
C
C
C
C
C
L
L
L
L
L
L
L
L
L
L
L
L
15 pF
50 pF
15 pF
50 pF
15 pF
50 pF
15 pF
50 pF
50 pF
50 pF
50 pF
50 pF