MEA-208 Zarlink Semiconductor, Inc., MEA-208 Datasheet
MEA-208
Related parts for MEA-208
MEA-208 Summary of contents
Page 1
Distinctive Characteristics t 8 independent Ethernet Access Ports Two 10/100Mbps Fast Ethernet Ports Direct interface with 10BaseT transceiver IEEE 802.3u compliant MII (Media Independent Inter- face) and Serial Management ...
Page 2
XpressFlow-2020 Series – Ethernet Switch Chipset Characteristics Continue t Works together with SC-220 Xpress- Flow Engine Forwards frames at full line-rate Distributed Flow Caching™ to re- duce frame forwarding latency t Half and Full ...
Page 3
XpressFlow-2020 Series – Ethernet Switch Chipset 1. PIN ASSIGNMENT 1.1 Logic Symbol L_D[31:0] L_A[18:2] 4 L_BWE[3:0]# 4 L_WE[3:0]# 4 L_OE[3:0]# L_ADSC# L_CLK P_D[15:0] P_A[11:1] P_CS# P_ADS# P_RWC P_BS16# P_RDY# P_INT P_RST# P_CLK S_D[31:0] S_MSGEN# ...
Page 4
XpressFlow-2020 Series – Ethernet Switch Chipset 1.2 Pin Assignment (Preliminary) Note: # Active low signal Input Input signal In-ST Input signal with Schmitt-Trigger Output Output signal (Tri-State driver) Out-OD Output signal with Open-Drain driver ...
Page 5
XpressFlow-2020 Series – Ethernet Switch Chipset Pin No(s). Control Buffer Memory Interface M4,N2,L3,M1,M2,L1,K3, L_D[31:0] L2,K4,K1,J3,K2,J1,J2, H3,H1,H2,G3,G1,G2,F1,F3,F 2,E1,E3,E2,D1,D3,D2,C1,C2, B1 A6,B6,C8,A7,D8,D7,C9, L_A[18:2] A8,B8,A9,C10,B9,D10, A10,C11,B10,A11 C7 L_A[19] / L_OE[3]# D5,A5,A3 L_OE[2:0]# D7,E4,B5,C4 L_WE[3:0]# C6,B4,A4,C5 L_BWE[3:0]# B3 L_ADSC# ...
Page 6
XpressFlow-2020 Series – Ethernet Switch Chipset Pin No(s). Symbol Test Facility A25 T_MODE N1,M3,P2,P1,N3,R2,P3,R1,T T_D[15:10] 2R3,T1,R4,U2,T3,U1,U4 Pin No(s). Symbol Power Pins D6,D11,D16,D21,F4, VDD F23,L4,L23,T4,T23,AA4,AA23 AC6,AC11,AC16,AC21 A1,A2,A26,B2,B25,B26, VSS C3,C24,D4,D9,D14,D19,D23, H4,J23,N4,P23,V4,W23,AC4, AC8,AC13, AC18,AC23,AD3,AD24, AE1,AE2,AE25,AF1, AF25 © ...
Page 7
XpressFlow-2020 Series – Ethernet Switch Chipset Pin Reference Table: 1.3 (352 pin BGA) Pin # Signal Name Pin # Signal Name F26 P_A[1] C18 S_D[13] G24 P_A[2] B17 S_D[14] E25 P_A[3] A18 S_D[15] E26 ...
Page 8
XpressFlow-2020 Series – Ethernet Switch Chipset 2. FUNCTIONAL DESCRIPTION 2.1 Local Memory (Local Buffer Memory) Interface t Uses industry standard Synchronous Burst Mode SRAM bytes 32k x 32, 64k x 32, ...
Page 9
XpressFlow-2020 Series – Ethernet Switch Chipset 2.1.2 Supported Memory Configurations RAM Chip # of RAM Total Buffer L_WE[3]# Size Chips Memory Size 32k 128k bytes 2 256k bytes 4 512k bytes ...
Page 10
XpressFlow-2020 Series – Ethernet Switch Chipset 2.2 Processor Bus Interface t Supports various industry standard micro-processors including: Intel 186, 386, and 486 family or equivalent Motorola MPC series embedded processors t Easily adapts to ...
Page 11
XpressFlow-2020 Series – Ethernet Switch Chipset 2.2.2 Motorola MPC801 Processor Interface P_CLK {CLKOUT} P_ADS# {TS#} P_A[11:1] {A[20:30]} P_CS# P_RWC {RD/WR#} P_RDY# {TA#} P_D[15:0] (in) {D[0:15]} P_D[15:0] (out) {D[0:15]} Note: Mnemonics with in {} are ...
Page 12
XpressFlow-2020 Series – Ethernet Switch Chipset 2.2.4 Intel 386 Processor Interface P_CLK PH2 (internal) PH2 P_ADS# P_A[11:1] P_CS# P_W/R# P_RDY# P_D[15:0] (in) P_D15:0] (out) Typical 386 CPU I/O Access Operations P_CLK PH2 (internal) P_RST# ...
Page 13
XpressFlow-2020 Series – Ethernet Switch Chipset 2.2.5 Register Map Note: All 32-bit registers are D-word aligned. All 16-bit registers are also D-word aligned and right justified. For the Little Endian CPUs, register offset bit ...
Page 14
XpressFlow-2020 Series – Ethernet Switch Chipset Register Description Access Control Function (Chip Level controls) AVXR VLAN Control Table (VCT) Index Register AVDR VCT Data Register AVTC VLAN Type Code AXSC Transmission Scheduling Control Register ...
Page 15
XpressFlow-2020 Series – Ethernet Switch Chipset 2.3 XpressFlow Bus Operation t Vertex Networks’ optimized XpressFlow Bus architecture t Provides 1.6G bps switching bandwidth -33 1.07G bps -40 1.28G bps -50 1.6G bps t Full ...
Page 16
XpressFlow-2020 Series – Ethernet Switch Chipset 2.3.2 Bus Cycle Waveforms S_CLK S_MSGEN# S_D[31:0] C0 S_EOF# S_IRDY XpressFlow Bus Data Transfer Cycle S_CLK S_MSGEN# S_D[31:0] C0 S_EOF# S_TABT# Command Cycle S_CLK S_REQ[k]# S_REQ[j]# S_HPREQ# High ...
Page 17
XpressFlow-2020 Series – Ethernet Switch Chipset S_CLK S_MSGEN# S_REQ[j]# S_GNT[j]# S_HPREQ# S_REQ[I]# S_GNT[I]# S_CLK S_REQ[k]# S_OVLD# Bus Overload pre-empts the data transfer request © 1998 Vertex Networks, Inc. 1999 ...
Page 18
XpressFlow-2020 Series – Ethernet Switch Chipset 2.4 10Mb Serial Interface for Port 0 through 7 t Fully compliant with IEEE 802.3 10M bit Serial Interface Stan- dard for connecting with external 10Mbps Ethernet Physical ...
Page 19
XpressFlow-2020 Series – Ethernet Switch Chipset CRS 100 nsec 100 nsec RXC RXD 2.5 Test Pins Symbol Type Name and Functions T_MODE CMOS Test Mode Selection & Test Output – Set Test Mode upon ...
Page 20
XpressFlow-2020 Series – Ethernet Switch Chipset 3. DC SPECIFICATION 3.1 ABSOLUTE MAXIMUM RATINGS Storage Temperature Operating Temperature Supply Voltage V with Respect Voltage on 5V Tolerant Input Pins Voltage on ...
Page 21
XpressFlow-2020 Series – Ethernet Switch Chipset 4. AC SPECIFICATION 4.1 XpressFlow Bus Interface: S_CLK S17 S_D[31:0] S19 S_MSGEN# S21 S_EOF# S23 S_IRDY S27 S_TABT# S29 S_HPREQ# S31 S_GNT# S33 S_OVLD# XpressFlow Bus Interface – ...
Page 22
XpressFlow-2020 Series – Ethernet Switch Chipset Symbol Parameter S1 S_D[31:0] output valid delay S2 S_MSGEN# output valid delay S3 S_EOF# output valid delay S4 S_IRDY output valid delay S6 S_TABT# output valid delay S7 ...
Page 23
XpressFlow-2020 Series – Ethernet Switch Chipset 4.2 CPU Bus Interface: P_CLK P15 P16-min P_D[31:0] CPU Bus Interface – Output float delay timing P_CLK P16-max P16-min P_D[15:0] P17-max P17-min P_RDY# P18-max P18-min P_INT CPU Bus ...
Page 24
XpressFlow-2020 Series – Ethernet Switch Chipset 4.3 Local Memory Interface: L_CLK L1 L2 L_D[31:0] Local Memory Interface – Input setup and hold timing L_CLK L10 L3-min L_D[31:0] Local Memory Interface – Output float delay ...
Page 25
XpressFlow-2020 Series – Ethernet Switch Chipset 5. PACKAGING INFORMATION 352-PIN BGA (35x35x2.33mm) Pin 1 I.D. A 24.00 Ref 32.00 Ref 35.00 +/- 0.20 1.17 Ref 0.56 2.33 Ref +/-0.13 Ordering Information Part Number Description ...
Page 26
... Fax: +1 (613) 592 6909 Asia/Pacific Tel: +65 333 6193 Fax: +65 333 6192 2 C Patent rights to use these components TECHNICAL DOCUMENTATION - NOT FOR RESALE Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 2 C System, provided that the system conforms ...
Page 27
... North America - East Coast Asia/Pacific 2 C Patent rights to use these components TECHNICAL DOCUMENTATION - NOT FOR RESALE Tel: (978) 322-4800 Fax: (978) 322-4888 Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 2 C System, provided that the system conforms ...