ADP3208D ON Semiconductor, ADP3208D Datasheet

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ADP3208D

Manufacturer Part Number
ADP3208D
Description
7-bit, Programmable, Dual-phase, Mobile, Cpu, Synchronous Buck Controller
Manufacturer
ON Semiconductor
Datasheet

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ADP3208D
7-Bit, Programmable,
Dual-Phase, Mobile, CPU,
Synchronous Buck
Controller
switching regulator controller. With its integrated drivers, the
ADP3208D is optimized for converting the notebook battery voltage
into the core supply voltage required by high performance Intel
processors. An internal 7−bit DAC is used to read a VID code directly
from the processor and to set the CPU core voltage to a value within
the range of 0.3 V to 1.5 V. The phase relationship of the output signals
ensures interleaved 2−phase operation.
programmable switching frequency and optimized for efficiency
depending on the output current requirement. The ADP3208D
switches between single− and dual−phase operation to maximize
efficiency with all load conditions. The chip includes a programmable
load line slope function to adjust the output voltage as a function of the
load current so that the core voltage is always optimally positioned for
a load transient. The ADP3208D also provides accurate and reliable
short−circuit protection, adjustable current limiting, and a delayed
power−good output. The IC supports On−The−Fly (OTF) output
voltage changes requested by the CPU.
temperature range of −10°C to 100°C and is available in a 48−lead
LFCSP.
Features
© Semiconductor Components Industries, LLC, 2010
February, 2010 − Rev. 0
The ADP3208D is a highly efficient, multiphase, synchronous buck
The ADP3208D uses a multi−mode architecture run at a
The ADP3208D is specified over the extended commercial
Single−Chip Solution
Fully Compatible with the Intel
Specifications
Integrated MOSFET Drivers
Input Voltage Range of 3.3 V to 22 V
Selectable 1− or 2−Phase Operation with Up to 1 MHz
per Phase Switching Frequency
Guaranteed ±8 mV Worst−Case Differentially Sensed
Core Voltage Error Overtemperature
Automatic Power−Saving Mode Maximizes Efficiency
with Light Load During Deeper Sleep Operation
Soft Transient Control Reduces Inrush Current and
Audio Noise
Active Current Balancing Between Output Phases
Independent Current Limit and Load Line Setting
Inputs for Additional Design Flexibility
Built−In Power−Good Blanking Supports Voltage
Identification (VID) OTF Transients
7−Bit, Digitally Programmable DAC with 0.3 V to
1.5 V Output
®
IMVP−6+t
1
Applications
Short−Circuit Protection with Latchoff Delay
Clock Enable Output Delays the CPU Clock Until the
Core Voltage is Stable
Output Load Current Monitor
This is a Pb−Free Device
Notebook Power Supplies for Next Generation
Intel
®
Processors
See detailed ordering and shipping information in the package
dimensions section on page 36 of this data sheet.
ORDERING INFORMATION
A
WL
YYWW = Date Code
G
MARKING DIAGRAM
http://onsemi.com
AWLYYWWG
= Assembly Location
= Wafer Lot
= Pb−Free Package
ADP3208D
Publication Order Number:
CASE 932AD
LFCSP48
ADP3208D/D

Related parts for ADP3208D

ADP3208D Summary of contents

Page 1

... The ADP3208D also provides accurate and reliable short−circuit protection, adjustable current limiting, and a delayed power−good output. The IC supports On−The−Fly (OTF) output voltage changes requested by the CPU ...

Page 2

COMP FB LLINE PSI PSI TTSNS VRTT PWRGD CLKEN FBRTN ABSOLUTE MAXIMUM RATINGS Parameter VCC, PVCC1, PVCC2 FBRTN, PGND1, PGND2 BST1, BST2 DC t < 200 ns BST1 to SW1, BST2 to SW2 SW1, SW2 DC t < 200 ns ...

Page 3

... DRVL2 PVCC2 1 kW SW2 DRVH2 BST2 1.0 V Figure 3. Current Sense Amplifier, V ADP3208D VCC 37 COMP LLINE 16 CSREF VID DAC 18 GND − Figure 4. Positioning Accuracy http://onsemi.com 3 ADP3208D VCC 37 CSCOMP 17 100 nF CSSUM - 19 CSREF + 18 CSCOMP - 1 GND = V=0mV D ...

Page 4

PIN FUNCTION DESCRIPTIONS Pin No Mnemonic 1 EN Enable Input. Driving this pin low shuts down the chip, disables the driver outputs, pulls PWRGD and VRTT low, and pulls CLKEN high. 2 PWRGD Power−Good Output. Open−drain output. A low logic ...

Page 5

... DPRSLP Deeper Sleep Control Input. EN PWRGD NC CLKEN FBRTN FB COMP NC IRPM/NC VARFREQ VRTT TTSNS Description 1 ADP3208D Figure 5. Pin Configuration (Top View) http://onsemi.com 5 BST1 DRVH1 SW1 PVCC1 DRVL1 PGND1 PGND2 DRVL2 PVCC2 SW2 DRVH2 BST2 ...

Page 6

ELECTRICAL CHARACTERISTICS = PGND2 = Low = VATFREQ = High, DPRSLP = 0 V, PSI = 1. noted (Note 1). Current entering a pin (sunk by the device) has a positive sign. R Parameter ...

Page 7

ELECTRICAL CHARACTERISTICS = PGND2 = Low = VATFREQ = High, DPRSLP = 0 V, PSI = 1. noted (Note 1). Current entering a pin (sunk by the device) has a positive sign. R Parameter ...

Page 8

ELECTRICAL CHARACTERISTICS = PGND2 = Low = VATFREQ = High, DPRSLP = 0 V, PSI = 1. noted (Note 1). Current entering a pin (sunk by the device) has a positive sign. R Parameter ...

Page 9

ELECTRICAL CHARACTERISTICS = PGND2 = Low = VATFREQ = High, DPRSLP = 0 V, PSI = 1. noted (Note 1). Current entering a pin (sunk by the device) has a positive sign. R Parameter ...

Page 10

ELECTRICAL CHARACTERISTICS = PGND2 = Low = VATFREQ = High, DPRSLP = 0 V, PSI = 1. noted (Note 1). Current entering a pin (sunk by the device) has a positive sign. R Parameter ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS VID LOAD CURRENT (A) Figure 7. PWM Mode Efficiency vs. Load Current ...

Page 12

TYPICAL PERFORMANCE CHARACTERISTICS V VID 350 300 250 200 150 100 0.5 1.0 OUTPUT VOLTAGE (V) Figure 13. Switching Frequency vs. Output Voltage in RPM Mode 1000 VID = 1.4125 V VID = 1.1 V VID = ...

Page 13

TYPICAL PERFORMANCE CHARACTERISTICS VID SWITCH NODE 1 1 CH1 10.0V CH3 5.00A REF1 10.0V 1.00ms Figure 19. Dual−Phase, Interleaved PWM Waveform Load SWITCH NODE 2 SWITCH NODE 1 OUTPUT VOLTAGE ...

Page 14

TYPICAL PERFORMANCE CHARACTERISTICS VID OUTPUT VOLTAGE DPRSLP SWITCH NODE 1 SWITCH NODE 2 PSI = HIGH LOAD = 2 A Figure 22. DPRSLP Transition OUTPUT VOLTAGE DPRSLP SWITCH NODE 2 SWITCH NODE 1 PSI = ...

Page 15

... In dual−phase operation, the ADP3208D runs in PWM mode, where the switching frequency is controlled by the master clock. In single−phase operation (commanded by the PSI low state), the ADP3208D runs in RPM mode, where the switching frequency is controlled by the ripple voltage appearing on the COMP pin. In RPM ...

Page 16

VRMP FLIP−FLOP RAMP FLIP−FLOP 400ns 30mV 1V VDC + – COMP FBRTN FB C ...

Page 17

... C Setting Switch Frequency Master Clock Frequency in PWM Mode When the ADP3208D runs in PWM, an external resistor connected from the RT pin to GND sets the clock frequency. The frequency is constant at a given VID code but varies with the VID voltage: the lower the VID voltage, the lower the clock frequency ...

Page 18

... Active Impedance Control Mode section. The magnitude of the internal ramp can be set so that the transient response of the system is optimal. The ADP3208D monitors the supply voltage to achieve feed forward control whenever the supply voltage changes. A resistor connected from the power input voltage rail to the RAMP pin determines the slope of the internal PWM ramp ...

Page 19

... The ADP3208D reads the VID codes provided by the CPU on VID0 to VID6 input pins after CLKEN is asserted low. The PWRGD signal is asserted after a t about 9 ms, as specified by IMVP− ...

Page 20

... In single−phase normal mode, DPRSLP is pulled low and the APD3208 operates in Continuous Conduction Mode (CCM) over the entire load range. The upper and lower MOSFETs run synchronously and in complementary phase. See Figure 32 for the typical waveforms of the ADP3208D running in CCM with load current. 4 SWITCH NODE 5.0 V/DIV ...

Page 21

... Figure 36). Figure 37 shows the inductor current and switch node voltage in DCM. In DCM with a light load, the ADP3208D monitors the switch node voltage to determine when to turn off the low−side FET. Figure 38 shows a typical waveform in DCM with load current ...

Page 22

... V threshold and the EN pin must be driven high. If the VCC voltage is less than the V a logic low, the ADP3208D shuts off. In shutdown mode, the controller holds the PWM outputs low, shorts the capacitors of the SS and PGDELAY pins to ground, and drives the DRVH and DRVL outputs low ...

Page 23

... VRTT when the temperature approaches the set alarm point. Current Monitor Function The ADP3208D has an output current monitor. The IMON pin sources a current proportional to the inductor current. A resistor from IMON pin to FBRTN sets the gain. ...

Page 24

Table 3. VID Code Table VID6 VID5 VID4 ...

Page 25

Table 3. VID Code Table VID6 VID5 VID4 ...

Page 26

http://onsemi.com 26 ...

Page 27

... Setting the Switching Frequency for RPM Operation of Phase 1 During the RPM mode operation of Phase 1, the ADP3208D runs in pseudo constant frequency, given that the load current is high enough for continuous current mode. While in discontinuous current mode, the switching frequency is reduced with the load current in a linear manner ...

Page 28

... DCR. Due to the nonlinear nature of NTC thermistors, series resistors R and R CS2 produce the desired temperature coefficient tracking. Place as close as possible ADP3208D CSCOMP CSSUM - CSREF + Figure 42. Temperature−Compensation Circuit The following procedure and expressions yield values for ...

Page 29

Compute the relative values for r by using the following equations CS2 ( ...

Page 30

... The maximum output current determines the R O requirement for the low−side (synchronous) MOSFETs. In the ADP3208D, currents are balanced between phases; the current in each low−side MOSFET is the output current divided by the total number of MOSFETs (n conduction losses being dominant, the following expression ...

Page 31

... With the multi−mode feedback structure of the is the droop ADP3208D necessary to set the feedback compensation O so that the converter’s output impedance works in parallel with the output decoupling. In addition necessary to compensate for the several poles and zeros created by the output inductor and decoupling capacitors (output filter) ...

Page 32

... A Type III compensator on the voltage feedback is adequate for proper compensation of the output filter. Figure 43 shows the Type III amplifier used in the ADP3208D. Figure 44 shows the locations of the two poles and two zeros created by this amplifier. VOLTAGE ERROR AMPLIFIER REFERENCE VOLTAGE COMP ...

Page 33

... Set Up and Test the Circuit 1. Build a circuit based on the compensation values computed from the design spreadsheet. Vishey thermistor 2. Connect a dc load to the circuit. 3. Turn on the ADP3208D and verify that it operates properly. TTSET1 4. Check for jitter with no load and full load conditions. 5.0 V Set the DC Load Line 1 ...

Page 34

The resulting waveform will be similar to that shown in Figure 47. Use the horizontal cursors to measure V and V ACDRP DCDRP 47. Do not measure the undershoot or overshoot that occurs immediately after the step. V ACDRP ...

Page 35

... V common node for the inductors of all the CORE phases the back of the ADP3208D package, there is a metal pad that can be used to heat sink the device. Therefore, running vias under the ADP3208D is not recommended because the metal pad may cause shorting between vias. ...

Page 36

... ORDERING INFORMATION Device Temperature Range ADP3208DJCPZ−RL −10°C to 100°C †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *The “Z” suffix indicates Pb−Free part. Package Package Option 48− ...

Page 37

... BSC D2 4.95 5.25 E 7.00 BSC E1 6.75 BSC E2 4.95 5.25 e 0.50 BSC H −−− 12 ° K 0.20 −−− L 0.30 0.50 M −−− 0.60 SOLDERING FOOTPRINT* 7.30 5.14 48X 0.63 1 7.30 48X 0.28 0.50 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative ADP3208D/D ...

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