TEF6721HL NXP Semiconductors, TEF6721HL Datasheet - Page 35

• Manufacturer Part Number: TEF6721HL
• Description: Car Radio Tuner Front-end For Digital If
• Manufacturer: NXP Semiconductors

Philips Semiconductors
TEF6721HL_4
Product data sheet
Fig 7. Inaudible AF update timing diagram
AFHOLD signal is used to hold the quality information for signal processing of the main channel during the alternative
frequency jumps. PLL registers are loaded during load PLL = 1, but actual frequency jumps take place at the falling edge of
this signal. IF counting is carried out during AFSAMPLE = 1. 10 s after falling edge of AFSAMPLE result is valid for AF
and remains valid until read by microcontroller. Quality tests in IF DSP should take place during the HIGH phase of
AFSAMPLE.
t
t
t
t
1
2
3
4
is the internal TEF6721HL clock related logic delay: 100 s.
should be > 1.1 ms to ensure correct loading of PLL for the main channel.
should be > 0 to ensure inaudible update.
= 500 s.
audio output
AFSAMPLE
of IF DSP
AFHOLD
load PLL
I
2
C-bus
AF channel
AF = 1
t
1
0
t
2
1
Rev. 04 — 20 December 2005
main channel
AF = 1
2
quality test
3
t
3
4
t
4
5
Car radio tuner front-end for digital IF
6
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
7
TEF6721HL
t (ms)
8
mdb415
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