HT46R63 Holtek Semiconductor Inc., HT46R63 Datasheet - Page 22

• Manufacturer Part Number: HT46R63
• Description: Ht46r63/ht46c63 -- A/d With Lcd Type 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

The following two programming examples illustrate how to setup and implement an A/D conversion. In the first exam-
ple, the method of polling the EOCB bit in the ADCR register is used to detect when the conversion cycle is complete,
whereas in the second example, the A/D interrupt is used to determine when the conversion is complete.
Example: using EOCB Polling Method to detect end of conversion
Start_conversion:
Polling_EOC:
Example: using interrupt method to detect end of conversion
Start_conversion:
; ADC interrupt service routine
ADC_ISR:
EXIT_INT_ISR:
Rev. 2.30
clr
mov
mov
mov
mov
clr
set
clr
sz
jmp
mov
mov
jmp
clr
mov
mov
mov
mov
clr
set
clr
clr
set
set
mov
mov
mov
mov
mov
clr
set
clr
mov
mov
mov
reti
EADI
a,00000001B
ACSR,a
a,00100000B
ADCR,a
:
:
:
START
START
START
EOCB
polling_EOC
a,ADR
adr_buffer,a
:
:
start_conversion
EADI
a,00000001B
ACSR,a
a,00100000B
ADCR,a
:
:
START
START
START
ADF
EADI
EMI
:
:
:
acc_stack,a
a,STATUS
status_stack,a
:
:
a,ADR
adr_buffer,a
START
START
START
:
:
a,status_stack
STATUS,a
a,acc_stack
; read conversion result high byte value from the ADR register
; disable ADC interrupt
; setup the ACSR register to select f
; setup ADCR register to configure Port PB0~PB3 as A/D inputs
; and select AN0 to be connected to the A/D converter
; reset A/D
; start A/D
; poll the ADCR register EOCB bit to detect end of A/D conversion
; continue polling
; save result to user defined memory
; start next A/D conversion
; disable ADC interrupt
; setup the ACSR register to select f
; setup ADCR register to configure Port PB0~PB3 as A/D inputs
; and select AN0 to be connected to the A/D converter
; reset A/D
; start A/D
; clear ADC interrupt request flag
; enable ADC interrupt
; enable global interrupt
; save ACC to user defined memory
; save STATUS to user defined memory
; read conversion result low byte value from the ADR register
; save result to user defined register
; reset A/D
; start A/D
; restore STATUS from user defined memory
; restore ACC from user defined memory
; As the Port B channel bits have changed the following START
; signal (0-1-0) must be issued within 10 instruction cycles
; As the Port B channel bits have changed the following START
; signal (0-1-0) must be issued within 10 instruction cycles
22
SYS
SYS
/8 as the A/D clock
/8 as the A/D clock
HT46R63/HT46C63
March 22, 2006