BUK107-50DS NXP Semiconductors, BUK107-50DS Datasheet - Page 6

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BUK107-50DS

Manufacturer Part Number
BUK107-50DS
Description
Powermos Transistor Logic Level Topfet
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
March 1997
PowerMOS transistor
Logic level TOPFET
Fig.14. Test circuit for resistive load switching times.
R
Fig.15. Typical switching waveforms, resistive load .
L
15
10
= 50 ; adjust V
5
0
Select R
-10
VIS & VDS / V
10 kO
I
to give I
10
RI
DD
Fig.17. Transient thermal impedance, TOPFET mounted on PCB of fig 19.
BC337
I
VIS
TOPFET
to obtain I
= 1.5 mA, ie 3.3 k approx.
1E+02
1E+01
1E+00
I
30
1E-01
1E-02
VIS
time / us
RL
P
1E-07
Zth j-amb / (K/W)
D =
D
S
0.05
0.02
VDD
50
D
0.5
0.2
0.1
= 250 mA; T
0
D.U.T.
measure
VDS
VDS
1E-05
BUK107-50DS
70
Z
th j-amb
0V
j
= 25˚C
= f(t); parameter D = t
90
1E-03
6
t / s
1E-01
100 nA
10 uA
10 nA
Fig.16. Typical drain source leakage current
I
1 uA
DSS
P
D
-50
= f(T
p
IDSS
/T
t
j
p
); conditions: V
1E+01
T
BUK107-50DS
0
D =
t
T
p
t
1E+03
Tj / C
50
DS
= 40 V; V
BUK107-50DS
Product specification
100
BUK107-50DS
IS
= 0 V.
Rev 1.200
150

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