BU9890GUL-W ROHM Co. Ltd., BU9890GUL-W Datasheet
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BU9890GUL-W
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BU9890GUL-W Summary of contents
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... Silicon Monolithic Integrated Circuit ◇PRODUCT 4K×8 bit Electrically Erasable PROM ◇PART NUMBER BU9890GUL-W ◇PHYSICAL DIMENSION Fig.-1(VCSP50L1) ◇BLOCK DIAGRAM Fig.-2 ◇USE General purpose ◇FEATURES ・4K words × 8 bits architecture serial EEPROM ・Wide operating voltage range (1.7V~3.6V) ・ Two wire serial interface ・ ...
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OPERATING CHARACTERISTICS (Unless otherwise specified Ta=-40~85℃、V Symb Parameter ol “H” Input Voltage1 V IH1 “L” Input Voltage1 V IL1 “H” Input Voltage2 V IH2 “L” Input Voltage2 V IL2 “H” Input Voltage3 V IH3 “L” Input Voltage3 V IL3 ...
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... Fig.-1 PHYSICAL DIMENSION (Unit : mm) REV. A Product Name : BU9890GUL-W Lot.No 3/13 ...
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DIAGRAM 12bit ADDRESS DECODER CONTOROL LOGIC TEST HIGH VOLTAGE GEN. 32 kbit EEPROM ARRAY SLAVE・WORD DATA 12bit ADDRESS REGISTER REGISTER START STOP ACK V LEVEL CC Fig.-2 BLOCK DIAGRAM TEST Pin Connect with GND REV. A Vcc GND 8bit ...
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CONFIGURATION ○ B TEST ○ A SDA ◇PIN NAME Land No. PIN NAME B3 Vcc B2 GND B1 TEST SCL A1 SDA ○ ○ GND VDD ○ ○ SCL ...
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OPERATING CHARACTERISTICS (Unless otherwise specified Ta=-40~85℃、V Parameter Clock Frequency Data Clock High Period Data Clock Low Period SDA and SCL Rise Time SDA and SCL Fall Time Start Condition Hold Time Start Condition Setup Time Input Data Hold Time ...
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DATA TIMING SCL t :STA HD SDA (IN) t BUF SDA (OUT) SCL t :STA SU SDA ○SDA data is latched into the chip at the rising edge of SCL clock. ○Output date toggles at the falling edge of ...
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TIMING SCL DATA( SDA ACK WP t :WP SU Fig.-6(a) WP TIMING OF THE WRITE OPERATION SCL DATA( SDA ACK WP Fig.-6(b) WP TIMING OF THE WRITE CANCEL OPERATION ○For the WRITE operation, WP must ...
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OPERATION ○START CONDITION (RECOGNITION OF START BIT) ・All commands are proceeded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH. ・The device continuously monitors the SDA and SCL lines for the ...
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The transmitter device will release the bus after transmitting eight bits. (When inputting the slave address in the write or read operation, transmitter is μ-COM. When outputting the ...
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WRITE SLAVE R T ADDRESS T E SDA LINE ○By using this command, the data is ...
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SLAVE R ADDRESS T SDA LINE Fig.-10 CURRENT READ CYCLE TIMING ○ In case that the previous operation is Random or Current Read (which includes Sequential Read respectively), the internal address counter is ...
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SLAVE A R ADDRESS D T SDA LINE Fig.-12 SEQUENTIAL READ CYCLE TIMING ( Current Read ) ○○If an Acknowledge is ...
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No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose ...